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PDF ADM8316 Data sheet ( Hoja de datos )

Número de pieza ADM8316
Descripción (ADM8316 - ADM8322) Supervisory Circuits
Fabricantes Analog Devices 
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Data Sheet
Supervisory Circuits with Watchdog
and Manual Reset in 5-Lead SOT-23
ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
FEATURES
26 reset threshold options
2.5 V to 5 V in 100 mV increments
4 reset timeout options
1 ms, 20 ms, 140 ms, and 1120 ms (minimum)
4 watchdog timeout options
6.3 ms, 102 ms, 1.6 sec, and 25.6 sec (typical)
Manual reset input
Multiple reset output options
Low power consumption
Specified over wide temperature range (−40°C to +125°C)
Qualified for automotive applications
5-lead SOT-23 package
APPLICATIONS
Automotive infotainment
Microprocessor systems
Computers
Controllers
Intelligent instruments
Portable equipment
FUNCTIONAL BLOCK DIAGRAMS
ADM8316
VCC
VREF
RESET
GENERATOR
VCC
RESET
MR DEBOUNCE
WATCHDOG
DETECTOR
GND
WDI
Figure 1. ADM8316
ADM8320
VCC
VREF
MR DEBOUNCE
RESET
GENERATOR
WATCHDOG
DETECTOR
RESET
GND
WDI
Figure 2. ADM8320
GENERAL DESCRIPTION
The ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/
ADM8322 are supervisory circuits that monitor power supply
voltage levels and code execution integrity in microprocessor-
based systems. As well as providing power-on reset signals, an
on-chip watchdog timer can reset the microprocessor if it fails
to strobe within a preset timeout period. A reset signal can also
be asserted by an external push-button switch through a manual
reset input. The six devices feature different combinations of
watchdog input, manual reset input, and output stage
configuration, as shown in Table 6.
Each device is available in a choice of 26 reset threshold options
ranging from 2.5 V to 5 V in 100 mV increments. There are also
four reset timeout options of 1 ms, 20 ms, 140 ms, and 1120 ms
(minimum) and four watchdog timeout options of 6.3 ms, 102 ms,
1.6 sec, and 25.6 sec (typical).
The ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/
ADM8322 are available in 5-lead SOT-23 packages and
typically consume only 10 µA, making them suitable for use in
low power, portable applications.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
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ADM8316 pdf
Data Sheet
ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 2.
Parameter
VCC
All Other Pins
Output Current (RESET, RESET)
Operating Temperature Range
Storage Temperature Range
θJA Thermal Impedance, SOT-23
Lead Temperature
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
Rating
−0.3 V to +6 V
−0.3 V to (VCC + 0.3 V)
20 mA
−40°C to +125°C
−65°C to +150°C
270°C/W
300°C
215°C
220°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 5 of 16
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ADM8316 arduino
Data Sheet
ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
APPLICATIONS INFORMATION
WATCHDOG INPUT CURRENT
To minimize the watchdog input current, leave WDI low for the
majority of the watchdog timeout period. When driven high,
WDI can draw as much as 100 µA. Pulsing WDI low to high to
low at a low duty cycle reduces the effect of the large input
current. When WDI is unconnected, a window comparator
disconnects the watchdog timer from the reset output circuitry
so that a reset is not asserted when the watchdog timer times out.
NEGATIVE GOING VCC TRANSIENTS
To avoid unnecessary resets caused by fast power supply transients,
the ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/
ADM8322 are equipped with glitch rejection circuitry. The typical
performance characteristic in Figure 13 plots VCC transient
duration vs. reset threshold overdrive. The curves show
combinations of reset threshold overdrive and duration for
which a reset is not generated for 5 V, 4.63 V, and 2.93 V reset
threshold devices. For example, with the 2.93 V threshold, a
transient that goes 100 mV below the threshold and lasts 80 µs
typically does not cause a reset, but if the transient is any larger
in reset threshold overdrive or duration, a reset generates. An
optional 0.1 µF bypass capacitor mounted near VCC provides
additional glitch rejection.
ENSURING RESET VALID TO VCC = 0 V
Both active low and active high reset outputs are guaranteed
to be valid for VCC as low as 0.9 V. However, by using an
external resistor with push-pull configured reset outputs, valid
outputs for VCC as low as 0 V are possible. For an active low reset
output, a resistor connected between RESET and ground pulls
the output low when it is unable to sink current. For an active
high reset output, a resistor connected between RESET and VCC
pulls the output high when it is unable to source current. Use a
large resistance, such as 100 kΩ, so that it does not overload the
reset output when VCC is greater than 0.9 V.
VCC
VCC
ADM8316/
ADM8318/
ADM8319
RESET
100k
ADM8318/
ADM8319/
ADM8321/
ADM8322
100kΩ
RESET
Figure 22. Ensuring Reset Valid to VCC = 0 V
WATCHDOG SOFTWARE CONSIDERATIONS
In implementing the microprocessor watchdog strobe code,
quickly switching WDI low to high and then high to low (mini-
mizing WDI high time) is desirable for current consumption
reasons. However, a more effective way of using the watchdog
function can be considered.
A low to high to low WDI pulse within a given subroutine
prevents the watchdog from timing out. However, if the sub-
routine becomes stuck in an infinite loop, the watchdog cannot
detect this because the subroutine continues to toggle WDI. A
more effective coding scheme for detecting this error involves
using a slightly longer watchdog timeout. In the program that
calls the subroutine, WDI is set high. The subroutine sets WDI
low when it is called. If the program executes without error, WDI
is toggled high and low with every loop of the program. If the
subroutine enters an infinite loop, WDI is kept low, the watchdog
times out, and the microprocessor is reset (see Figure 23).
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE
SET WDI
LOW
RESET
INFINITE LOOP:
WATCHDOG
TIMES OUT
RETURN
Figure 23. Watchdog Flow Diagram
VCC
RESET
ADM8316
MR WDI
RESET
MICROPROCESSOR
I/O
Figure 24. Typical Application Circuit
Rev. 0 | Page 11 of 16
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