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PDF AD7451 Data sheet ( Hoja de datos )
| Número de pieza | AD7451 | |
| Descripción | (AD7451 / AD7441) 12- & 10-Bit ADCs | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD7451 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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PRELIMINARY TECHNICAL DATA
a
Pseudo Differential, 1MSPS,
12- & 10-Bit ADCs in 8-lead SOT-23
Preliminary Technical Data
AD7451/AD7441
FEATURES
Fast Throughput Rate: 1MSPS
Specified for VDD of 2.7 V to 5.25 V
Low Power at max Throughput Rate:
3.75 mW typ at 1MSPS with VDD = 3 V
9 mW typ at 1MSPS with VDD = 5 V
Pseudo Differential Analog Input
Wide Input Bandwidth:
70dB SINAD at 300kHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface - SPITM/QSPITM/
MICROWIRETM/ DSP Compatible
Power-Down Mode: 1µA max
8 Pin SOT-23 and µSOIC Packages
APPLICATIONS
Transducer Interface
Battery Powered Systems
Data Acquisition Systems
Portable Instrumentation
Motor Control
Communications
GENERAL DESCRIPTION
The AD7451/AD7441 are respectively 12- and 10-bit,
high speed, low power, successive-approximation (SAR)
analog-to-digital converters that feature a pseudo differen-
tial analog input. These parts operate from a single 2.7 V
to 5.25 V power supply and feature throughput rates up to
1MSPS.
The parts contains a low-noise, wide bandwidth, differen-
tial track and hold amplifier (T/H) which can handle
input frequencies in excess of 1MHz with the -3dB point
being 20MHz typically. The reference voltage is 2.5 V
and is applied externally to the VREF pin.
The conversion process and data acquisition are controlled
using CS and the serial clock allowing the device to inter-
face with Microprocessors or DSPs. The input signals are
sampled on the falling edge of CS and the conversion is
also initiated at this point.
The SAR architecture of these parts ensures that there are
no pipeline delays.
FUNCTIONAL BLOCK DIAGRAM
VDD
VIN+
VIN-
VREF
T/H
12-BIT SUCCESSIVE
APPROXIMATION
ADC
AD7451/
AD7441
CONTROL
LOGIC
SCLK
SDATA
+5
GND
The AD7451/41 use advanced design techniques to achieve
very low power dissipation at high throughput rates.
PRODUCT HIGHLIGHTS
1.Operation with 2.7 V to 5.25 V power supplies.
2.High Throughput with Low Power Consumption.
With a 3V supply, the AD7451/41 offer 3.75mW typ
power consumption for 1MSPS throughput.
3.Pseudo Differential Analog Input.
The VIN- input can be used as an offset from ground
4.Flexible Power/Serial Clock Speed Management.
The conversion rate is determined by the serial clock,
allowing the power to be reduced as the conversion time
is reduced through the serial clock speed increase. These
parts also feature a shutdown mode to maximize power
efficiency at lower throughput rates.
5.No Pipeline Delay.
6.Accurate control of the sampling instant via a CS input
and once off conversion control.
MICROWIRE is a trademark of National Semiconductor Corporation.
SPI and QSPI are trademarks of Motorola, Inc.
REV. PrC 24/05/02
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
Free Datasheet http://www.Datasheet4U.com
1 page  
PRELIMINARY TECHNICAL DATA
AD7441-SPECIFICATIONS1
AD7451/AD7441
Parameter
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time2
Throughput Rate6
POWER REQUIREMENTS
VDD
IDD6,7
Normal Mode(Static)
Normal Mode (Operational)
Full Power-Down Mode
Power Dissipation
Normal Mode (Operational)
Full Power-Down
Test Conditions/Comments
888ns with an 18MHz SCLK
Sine Wave Input
Step Input
SCLK On or Off
VDD = 5 V.
VDD = 3 V.
SCLK On or Off
VDD =5 V.
VDD =3 V.
VDD =5 V. SCLK On or Off
VDD =3 V. SCLK On or Off
B Version1 Units
16
200
TBD
1
SCLK cycles
ns max
ns max
MSPS max
2.7/5.25
0.5
1.8
1.25
1
9
3.75
5
3
Vmin/max
mA typ
mA max
mA max
µA max
mW max
mW max
µW max
µW max
NOTES
1Temperature ranges as follows: B Versions: –40°C to +85°C.
2See ‘Terminology’ section.
3 A small DC input is applied to VIN- to provide a pseudo ground for VIN+
4Sample tested @ +25°C to ensure compliance.
5See POWER VERSUS THROUGHPUT RATE section.
6See ‘Serial Interface Section’.
7Measured with a midscale DC input.
Specifications subject to change without notice.
REV. PrC
–5–
Free Datasheet http://www.Datasheet4U.com
5 Page 
PRELIMINARY TECHNICAL DATA
AD7451/AD7441
AD7451 PERFORMANCE CURVES
(Default Conditions: TA = 25°C, Fs = 1MSPS, FSCLK
= 18MHz, VDD = 2.7 V to 5.25 V, VREF = 2.5 V)
00
0 6*,
0 6*,
0
0 00 00 00
TITLE
TPC 6. AD7451 Dynamic Performance
0
0 6*,
0
0 00 00 00
TITLE
TPC 9. Histogram of 10000 conversions of a DC Input for
the AD7451
0
0 00 00 0
TITLE
TPC 7. Typical DNL For the AD7451
0
0
0 6*,
0
0 00 00 00
TITLE
TPC 8. Typical INL For the AD7451
REV. PrC
–11–
Free Datasheet http://www.Datasheet4U.com
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet AD7451.PDF ] | |
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