PDF ADN2913 Data sheet ( Hoja de datos )

Número de pieza	ADN2913
Descripción	Continuous Rate 6.5 Mbps to 8.5 Gbps Clock and Data Recovery IC
Fabricantes	Analog Devices
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No Preview Available ! Data Sheet Continuous Rate 6.5 Mbps to 8.5 Gbps Clock and Data Recovery IC with Integrated Limiting Amp/EQ ADN2913 FEATURES GENERAL DESCRIPTION Serial data input: 6.5 Mbps to 8.5 Gbps No reference clock required Exceeds SONET/SDH requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6.3 mV typical (limiting amplifier mode) Optional limiting amplifier, equalizer (EQ), and 0 dB EQ inputs Programmable jitter transfer bandwidth to support G.8251 OTN Programmable slice level Sample phase adjust (5.65 Gbps or greater) Output polarity invert Programmable LOS threshold via I2C I2C interface to access optional features The ADN2913 provides the receiver functions of quantization, signal level detection, and clock and data recovery for continuous data rates from 6.5 Mbps to 8.5 Gbps. The ADN2913 automati- cally locks to all data rates without the need for an external reference clock or programming. ADN2913 jitter performance exceeds all jitter specifications required by SONET/SDH, including jitter transfer, jitter generation, and jitter tolerance. The ADN2913 provides manual or automatic slice adjust and manual sample phase adjusts. Additionally, the user can select a limiting amplifier, equalizer, or 0 dB EQ at the input. The equalizer is adaptive or it can be manually set. Loss of signal (LOS) alarm (limiting amplifier mode only) The receiver front-end loss of signal (LOS) detector circuit Loss of lock (LOL) indicator PRBS generator/detector Application-aware power 352 mW at 8.5 Gbps, equalizer mode, no clock output 380 mW at 6.144 Gbps, limiting amplifier mode, no clock output 340 mW at 622 Mbps, 0 dB EQ mode, no clock output Power supplies: 1.2 V, flexible 1.8 V to 3.3 V, and 3.3 V 4 mm × 4 mm, 24-lead LFCSP APPLICATIONS SONET/SDH OC-1/OC-3/OC-12/OC-48 and all associated FEC rates indicates when the input signal level falls below a user- programmable threshold. The LOS detection circuit has hysteresis to prevent chatter at the LOS output. In addition, the input signal strength can be read through the I2C registers. The ADN2913 also supports pseudorandom binary sequence (PRBS) generation, bit error detection, and input data rate readback features. The ADN2913 is available in a compact 4 mm × 4 mm, 24-lead lead frame chip scale package (LFCSP). All ADN2913 specifica- tions are defined over the ambient temperature range of −40°C to +85°C, unless otherwise noted. 1GE, 1GFC, 2GFC, 4GFC, 8GFC, CPRI OS/L.6 up to OS/L.60 Any rate regenerators/repeaters FUNCTIONAL BLOCK DIAGRAM SCK SDA LOL REFCLKP/ REFCLKN (OPTIONAL) DATOUTP/ DATOUTN CLKOUTP/ CLKOUTN I2C_ADDR I2C REGISTERS FREQUENCY ACQUISITION AND LOCK DETECTOR DATA RATE ADN2913 CML CML CLK DDR LOS LOS DETECT SAMPLE PHASE ADJUST FIFO ÷N ÷2 LA PIN 2 DATA INPUT NIN 0dB EQ SAMPLER 50Ω 50Ω EQ I2C I2C VCM VCC FLOAT RXD RXCK DOWNSAMPLER AND LOOP FILTER PHASE SHIFTER DCO CLOCK Figure 1. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com Free Datasheet http://www.datasheetlist.com/ 1 page Data Sheet ADN2913 Parameter Jitter Generation 8GFC2 OC-48 OC-12 OC-3 Jitter Tolerance 8GFC,2 JTSPAT Sinusoidal Jitter at 340 kHz Sinusoidal Jitter at 5.098 MHz Sinusoidal Jitter at 80 MHz Rx Jitter Tracking Test3 510 kHz, 1 UI 100 kHz, 5 UI OC-48 OC-12 OC-3 Test Conditions/Comments Min Typ Unfiltered Unfiltered 12 kHz to 20 MHz Unfiltered 12 kHz to 20 MHz Unfiltered 12 kHz to 5 MHz Unfiltered 12 kHz to 5 MHz Unfiltered 12 kHz to 1.3 MHz Unfiltered 12 kHz to 1.3 MHz Unfiltered TRANBW[2:0] = 4 (default) 0.005 0.044 0.0025 0.0156 0.0007 0.0038 0.0002 0.0008 Voltage modulation amplitude (VMA) = 170 mV p-p at 100 MHz, 425 mV p-p at 100 MHz, 170 mV p-p at 2.5 GHz, and 425 mV p-p at 2.5 GHz excitation frequency4 600 Hz 6 kHz 100 kHz 1 MHz 20 MHz 30 Hz 300 Hz 25 kHz 250 kHz 5 MHz 30 Hz 300 Hz 6500 Hz 65 kHz 1.3 MHz 10−12 10−12 6.7 0.53 0.59 <10−12 <10−12 1528 378 16.6 0.70 0.63 193 44 19.2 0.82 0.60 50.0 24.0 14.4 0.80 0.61 1 Jitter transfer bandwidth is programmable by adjusting TRANBW[2:0] in the DPLLA register (Address 0x10). 2 Fibre Channel Physical Interface-4 standard, FC-PI-4, Rev 8.00, May 21, 2008. 3 Conditions of FC-PI-4, Rev 8.00, Table 27, 800-DF-EL-S apply. 4 Must have zero errors during the tests for an interval of time that is ≤10−12 BER to pass the tests. Max Unit 0.0046 0.0276 0.0011 0.0076 0.0003 0.0018 UI rms UI p-p UI rms UI rms UI p-p UI p-p UI rms UI rms UI p-p UI p-p UI rms UI rms UI p-p UI p-p UI p-p UI p-p UI p-p BER BER UI p-p UI p-p UI p-p UI p-p UI p-p UI p-p UI p-p UI p-p UI p-p UI p-p UI p-p UI p-p UI p-p UI p-p UI p-p Rev. 0 \| Page 5 of 36 Free Datasheet http://www.datasheetlist.com/ 5 Page Data Sheet ADN2913 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VCC = 1.2 V, VCC1 = 1.8 V, VDD = 3.3 V, VEE = 0 V, input data pattern: PRBS 215 − 1, ac-coupled inputs and outputs, unless otherwise noted. 19.6ps/DIV Figure 6. Output Eye Diagram at 8GFC 1k ADN2913 SONET MASK 100 10 1 0.1 100 1k 100 1k 10k 100k 1M JITTER FREQUENCY (Hz) Figure 7. Jitter Tolerance: 8GFC 10M 100M ADN2913 EQUIPMENT LIMIT SONET MASK 10 1 0.1 10 100 1k 10k 100k 1M 10M 100M JITTER FREQUENCY (Hz) Figure 8. Jitter Tolerance: OC-48 66.9ps/DIV Figure 9. Output Eye Diagram at OC-48 5 0 –5 ADN2913 SONET MASK –10 –15 –20 –25 –30 –35 –40 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 10. Jitter Transfer: 8GFC (TRANBW[2:0] = 4) 5 ADN2913 SONET MASK 0 –5 –10 –15 –20 –25 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 11. Jitter Transfer: OC-48 100M Rev. 0 \| Page 11 of 36 Free Datasheet http://www.datasheetlist.com/ 11 Page

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