Datenblatt-pdf.com


P89V51RC2FBC Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer P89V51RC2FBC
Beschreibung 8-bit 80C51 5 V low power 16/32/64 kB flash microcontroller
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 30 Seiten
P89V51RC2FBC Datasheet, Funktion
P89V51RB2/RC2/RD2
8-bit 80C51 5 V low power 16/32/64 kB flash microcontroller
with 1 kB RAM
Rev. 05 — 12 November 2009
Product data sheet
1. General description
The P89V51RB2/RC2/RD2 are 80C51 microcontrollers with 16/32/64 kB flash and
1024 B of data RAM.
A key feature of the P89V51RB2/RC2/RD2 is its X2 mode option. The design engineer
can choose to run the application with the conventional 80C51 clock rate (12 clocks per
machine cycle) or select the X2 mode (six clocks per machine cycle) to achieve twice the
throughput at the same clock frequency. Another way to benefit from this feature is to keep
the same performance by reducing the clock frequency by half, thus dramatically reducing
the EMI.
The flash program memory supports both parallel programming and in serial ISP. Parallel
programming mode offers gang-programming at high speed, reducing programming costs
and time to market. ISP allows a device to be reprogrammed in the end product under
software control. The capability to field/update the application firmware makes a wide
range of applications possible.
The P89V51RB2/RC2/RD2 is also capable of IAP, allowing the flash program memory to
be reconfigured even while the application is running.
2. Features
I 80C51 CPU
I 5 V operating voltage from 0 MHz to 40 MHz
I 16/32/64 kB of on-chip flash user code memory with ISP and IAP
I Supports 12-clock (default) or 6-clock mode selection via software or ISP
I SPI and enhanced UART
I PCA with PWM and capture/compare functions
I Four 8-bit I/O ports with three high-current port 1 pins (16 mA each)
I Three 16-bit timers/counters
I Programmable watchdog timer
I Eight interrupt sources with four priority levels
I Second DPTR register
I Low EMI mode (ALE inhibit)
I TTL- and CMOS-compatible logic levels
Free Datasheet http://www.datasheet-pdf.com/






P89V51RC2FBC Datasheet, Funktion
NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
5.2 Pin description
Table 3. P89V51RB2/RC2/RD2 pin description
Symbol
Pin
Type
DIP40 TQFP44 PLCC44
P0.0 to P0.7
I/O
P0.0/AD0
39
37
43
I/O
I/O
P0.1/AD1
38
36
42
I/O
I/O
P0.2/AD2
37
35
41
I/O
I/O
P0.3/AD3
36
34
40
I/O
I/O
P0.4/AD4
35
33
39
I/O
I/O
P0.5/AD5
34
32
38
I/O
I/O
P0.6/AD6
33
31
37
I/O
I/O
P0.7/AD7
32
30
36
I/O
I/O
P1.0 to P1.7
I/O with
internal
pull-up
P1.0/T2
1
P1.1/T2EX 2
40 2
41 3
I/O
I/O
I/O
I
Description
Port 0: Port 0 is an 8-bit open drain bidirectional I/O port.
Port 0 pins that have ‘1’s written to them float, and in this
state can be used as high-impedance inputs. Port 0 is also
the multiplexed low-order address and data bus during
accesses to external code and data memory. In this
application, it uses strong internal pull-ups when
transitioning to ‘1’s. Port 0 also receives the code bytes
during the external host mode programming, and outputs
the code bytes during the external host mode verification.
External pull-ups are required during program verification
or as a general purpose I/O port.
P0.0 — Port 0 bit 0.
AD0 — Address/data bit 0.
P0.1 — Port 0 bit 1.
AD1 — Address/data bit 1.
P0.2 — Port 0 bit 2.
AD2 — Address/data bit 2.
P0.3 — Port 0 bit 3.
AD3 — Address/data bit 3.
P0.4 — Port 0 bit 4.
AD4 — Address/data bit 4.
P0.5 — Port 0 bit 5.
AD5 — Address/data bit 5.
P0.6 — Port 0 bit 6.
AD6 — Address/data bit 6.
P0.7 — Port 0 bit 7.
AD7 — Address/data bit 7.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal
pull-ups. The Port 1 pins are pulled high by the internal
pull-ups when ‘1’s are written to them and can be used as
inputs in this state. As inputs, Port 1 pins that are
externally pulled LOW will source current (IIL) because of
the internal pull-ups. P1.5, P1.6, P1.7 have high current
drive of 16 mA. Port 1 also receives the low-order address
bytes during the external host mode programming and
verification.
P1.0 — Port 1 bit 0.
T2 — External count input to Timer/counter 2 or Clock-out
from Timer/counter 2.
P1.1 — Port 1 bit 1.
T2EX: Timer/counter 2 capture/reload trigger and direction
control.
P89V51RB2_RC2_RD2_5
Product data sheet
Rev. 05 — 12 November 2009
© NXP B.V. 2009. All rights reserved.
6 of 80
Free Datasheet http://www.datasheet-pdf.com/

6 Page









P89V51RC2FBC pdf, datenblatt
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx
xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
Table 4. Special function registers …continued
* indicates SFRs that are bit addressable
Name
Description
SFR
address
MSB
Bit functions and addresses
LSB
FST Flash Status Register
B6 - SB - - EDC - - -
Bit address AF AE AD AC AB AA A9 A8
IEN0*
Interrupt Enable 0
A8H EA
EC ET2 ES0 ET1 EX1 ET0 EX0
Bit address EF EE ED EC EB EA E9 E8
IEN1*
Interrupt Enable 1
E8H - - - - EBO
Bit address BF BE BD BC BB BA B9 B8
IP0* Interrupt Priority
B8H -
PPC
PT2
PS
PT1 PX1 PT0 PX0
IP0H
Interrupt Priority 0 HIGH
B7H
-
PPCH
PT2H
PSH
PT1H
PX1H
PT0H
PX0H
Bit address FF FE FD FC FB FA F9 F8
IP1* Interrupt Priority 1
F8H - - - - PBO
IP1H
Interrupt Priority 1 HIGH
F7H -
-
-
- PBOH
FCF
B1H -
-
-
-
-
-
SWR
BSEL
Bit address
87
86
85
84
83
82
81
80
P0* Port 0
80H AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
Bit address
97
96
95
94
93
92
91
90
P1* Port 1
90H CEX4/ CEX3/ CEX2/ CEX1/ CEX0 ECI T2EX
SPICLK
MISO
MOSI
SS
T2
Bit address A7 A6 A5 A4 A3 A2 A1 A0
P2* Port 2
A0H A15 A14 A13 A12 A11 A10
A9
A8
Bit address B7 B6 B5 B4 B3 B2 B1 B0
P3* Port 3
B0H RD WR T1
T0
INT1
INT0
TXD
RXD
PCON
Power Control Register
87H SMOD1 SMOD0
BOF
POF
GF1
GF0
PD
IDL
Bit address D7 D6 D5 D4 D3 D2 D1 D0
PSW*
Program Status Word
D0H
CY
AC
F0
RS1 RS0
OV
F1
P
RCAP2H Timer2 Capture HIGH
CBH
RCAP2L Timer2 Capture LOW
CAH
Bit address
9F
9E
9D 9C 9B
9A
99
98
SCON*
Serial Port Control
98H SM0/FE_
SM1
SM2
REN
TB8
RB8
TI
RI
SBUF
Serial Port Data Buffer Register 99H

12 Page





SeitenGesamt 30 Seiten
PDF Download[ P89V51RC2FBC Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
P89V51RC2FBC8-bit 80C51 5 V low power 16/32/64 kB flash microcontrollerNXP Semiconductors
NXP Semiconductors

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche