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P5NB100FP Schematic ( PDF Datasheet ) - STMicroelectronics

Teilenummer P5NB100FP
Beschreibung STP5NB100FP
Hersteller STMicroelectronics
Logo STMicroelectronics Logo 




Gesamt 9 Seiten
P5NB100FP Datasheet, Funktion
STP5NB100
® STP5NB100FP
N - CHANNEL 1000V - 2.4- 5A - TO-220/TO-220FP
PowerMESHMOSFET
TYPE
VDSS
R DS ( o n )
ID
STP5NB100
1000 V
STP5NB100FP 1000 V
< 2.7
< 2.7
5A
5A
ν TYPICAL RDS(on) = 2.4
ν EXTREMELY HIGH dv/dt CAPABILITY
ν 100% AVALANCHE TESTED
ν VERY LOW INTRINSIC CAPACITANCES
ν GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
3
2
1
TO-220
3
2
1
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
ν HIGH CURRENT, HIGH SPEED SWITCHING
ν SWITCH MODE POWER SUPPLIES (SMPS)
ν DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
S ymb ol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
VGS
ID
ID
IDM()
Ptot
Drain- gate Voltage (RGS = 20 k)
Gate-source Voltage
Drain Current (continuous) at Tc = 25 oC
Drain Current (continuous) at Tc = 100 oC
Drain Current (pulsed)
Total Dissipation at Tc = 25 oC
Derating Factor
dv/dt(1) Peak Diode Recovery voltage slope
VISO I nsulat ion W ithst and Voltage (DC)
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
() Pulse width limited by safe operating area
(*) Limited only by maximum temperature allowed
February 2000
Va l u e
STP5NB100 STP5NB100FP
1000
1000
± 30
5 5(*)
3.1 3.1(*)
15.2
15.2
135 40
1.08
0.32
4.5 4.5
2000
-65 to 150
150
(1) ISD 5 A, di/dt 200 A/µs, VDD V(BR)DSS, Tj TJMAX
Unit
V
V
V
A
A
A
W
W/oC
V/ns
V
oC
oC
1/9
Free Datasheet http://www.Datasheet-PDF.com/






P5NB100FP Datasheet, Funktion
STP5NB100/STP5NB100FP
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/9
Free Datasheet http://www.Datasheet-PDF.com/

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