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PDF CAT6611 Data sheet ( Hoja de datos )
| Número de pieza | CAT6611 | |
| Descripción | Single-Link HDMI Transmitter | |
| Fabricantes | ETC | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CAT6611 (archivo pdf) en la parte inferior de esta página. Total 26 Páginas | ||
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CAT6611
Single-Link HDMI Transmitter
Data Sheet ver. 1.0a, 2006/12/21
Free Datasheet http://www.datasheet4u.com/
1 page  
CAT6611 Single-Link HDMI Transmitter Data Sheet
Pin Description
Digital Video Input Pins
Pin Name
Direction Description
D[23:0]
Input
Digital video input pins. D[23:12] are only used in 24-bit
single-edged mode. In 12-bit, dual-edged mode D[23:12]
should be tied to ground.
DE
HSYNC
VSYNC
PCLK
Input
Input
Input
Input
Data enable
Horizontal sync. signal
Vertical sync. signal
Input data clock
Type
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Pin No.
49-58,
61-65,
67-70,
75-79
80
1
2
66
Digital Audio Input Pins
Pin Name
Direction Description
MCLK
Input
Audio master clock input
SCK
Input
I2S serial clock input
WS
Input
I2S word select input
I2S0
Input
I2S serial data input
I2S1
Input
I2S serial data input
I2S2
Input
I2S serial data input
I2S3
Input
I2S serial data input
SPDIF
Input
S/PDIF audio input
Type
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Pin No.
6
12
11
10
9
8
7
5
Programming Pins
Pin Name
Direction
INT#
Output
SYSRSTN Input
DDCSCL
I/O
DDCSDA
I/O
PCSCL
Input
PCSDA
I/O
OVSS /
Ground /
ROMSCL
Output
OVDD /
ROMSDA
Power /
Input
PCADR
HPD
Input
Input
Description
Type
Interrupt output. Default active-low (5V-tolerant)
LVTTL
Hardware reset pin. Active LOW (5V-tolerant)
I2C Clock for DDC (5V-tolerant)
I2C Data for DDC (5V-tolerant)
I2C Clock for chip programming (5V-tolerant)
I2C Data for chip programming (5V-tolerant)
Master I2C Clock for reading external HDCP Key ROM.
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Ground /
When using internal HDCP, Pin 72 should be connected to Schmitt
I/O ground (OVSS).
Master I2C Data for reading external HDCP Key ROM.
Power /
When using internal HDCP, Pin 71 should be connected to Schmitt
3.3V I/O power (OVDD).
I2C device address select
LVTTL
Hot Plug Detection (5V-tolerant)
LVTTL
Pin No.
17
42
20
19
43
44
72
71
41
18
5
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
CAT6611 Single-Link HDMI Transmitter Data Sheet
Configuration and Function Control
CAT6611 includes two I2C ports by default (i.e. with embedded HDCP keys): one for interfacing
with micro-controller, the other for accessing the DDC channels of HDMI link. If the customer
elects to use CAT6611 with external HDCP keys, there's an additional I2C port for interfacing with
the HDCP ROM.
The I2C interface for interfacing the micro-controller is a slave interface, comprising PCSCL (Pin 43)
and PCSDA (Pin 44). The micro-controller uses this interface to monitor all the statuses and control
all the functions. Two device addresses are available, depending on the input logic level of PCADR
(Pin 41). If PCADR is pulled high by the user, the device address is 0x9A. If pulled low, 0x98.
The I2C interface for accessing the DDC channels of the HDMI link is a master interface,
comprising DDCSCL (Pin 20) and DDCSDA (Pin 19). CAT6611 uses this interface to read the
EDID data and perform HDCP authentication protocol with the sink device over the HDMI cable.
For temporarily storing the acquired EDID data, CAT6611 includes a 32 bytes dedicated FIFO. The
micro-controller may command CAT6611 to acquire 32 bytes of EDID information, read it back and
then continue to read the next 32 bytes until getting all neccessary EDID informations.
The HDCP protocol of CAT6611 is completely implemented in hardware. No software intervention
is needed except for revocation list checking. Various HDCP-related statuses are stored in HDCP
registers for the reference of micro-controller. Refer to CAT6611 Programming Guide for detailed
register descriptions. The HDCP Standard also specifies a special message read protocol other than
the standard I2C protocol. See Figure 4 for checking HDCP port link integrity.
Figure 4. HDCP port link integrity message read
Shall the user opt to purchase CAT6611 with external HDCP ROM, Pin 72 (ROMSCL) and Pin 71
(ROMSDA) form the third I2C port and interface with the external HDCP ROM. This interface is a
master one.
All I2C interfaces conform to standard I2C transactions and operate at up to 100kHz.
11
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet CAT6611.PDF ] | |
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