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ADM1186 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADM1186
Beschreibung Quad Voltage Up and Down Sequencer and Monitor
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 29 Seiten
ADM1186 Datasheet, Funktion
Data Sheet
Quad Voltage Up and Down Sequencer
and Monitor with Programmable Timing
ADM1186
FEATURES
Powered from 2.7 V to 5.5 V on the VCC pin
Monitors four supplies via 0.8% accurate comparators
Digital core supports up and down supply sequencing
Multiple devices can be cascaded (ADM1186-1)
Four inputs can be programmed to monitor different voltage
levels with resistor dividers
Capacitor programmable supply sequence time delays
and a timeout delay to 5% accuracy at 25°C
Four open-drain enable outputs
Open-drain power-good output
Open-drain sequence complete pin and bidirectional
open-drain fault pin (ADM1186-1 only)
APPLICATIONS
Monitor and alarm functions
Up and down power supply sequencing
Telecommunication and data communication equipment
PCs, servers, and notebook PCs
GENERAL DESCRIPTION
The ADM1186-1 and ADM1186-2 are integrated, four-channel
voltage monitoring and sequencing devices. A 2.7 V to 5.5 V
power supply is required on the VCC pin for power.
Four precision comparators, VIN1 to VIN4, monitor four
voltage rails. All four comparators share a 0.6 V reference and
have a worst-case accuracy of 0.8%. Resistor networks that are
external to the VIN1, VIN2, VIN3, and VIN4 pins set the
undervoltage (UV) trip points for the monitored supply rails.
The ADM1186-1 and ADM1186-2 have four open-drain enable
outputs, OUT1 to OUT4, that are used to enable power supplies.
An open-drain power-good output, PWRGD, indicates whether
the four VINx inputs are above their UV thresholds.
A state machine monitors the state of the UP and DOWN pins
on the ADM1186-1 or the UP/DOWN pin on the ADM1186-2
to control the supply sequencing direction (see Figure 2). In the
WAIT START state, a rising edge transition on the UP or
UP/DOWN pin triggers a power-up sequence. A falling edge
transition on the DOWN or UP/DOWN pin in the POWER-UP
DONE state triggers a power-down sequence.
3.3V AUX
SEQUENCE CONTROL
3.3V AUX
1µF
100nF
APPLICATION DIAGRAM
5V
5V
IN
ADP1706
EN OUT
5V
5V
IN
ADP2107
EN OUT
3.3V AUX
3.3V AUX
IN
ADP1821
EN OUT
5V
5V
IN
ADP1706
EN OUT
VCC OUT1 OUT2 OUT3 OUT4
FAULT
UP
DOWN
ADM1186-1
DLY_EN_OUT1
VIN1
VIN2
VIN3
VIN4
DLY_EN_OUT2
DLY_EN_OUT3
DLY_EN_OUT4
PWRGD
BLANK_DLY
GND
SEQ_DONE
2.5V AUX
2.5V
1.8V
1.2V
3.3V
3.3V AUX
Figure 1.
Rev. B
Document Feedback
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2008–2013 Analog Devices, Inc. All rights reserved.
Technical Support
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ADM1186 Datasheet, Funktion
Data Sheet
ADM1186
Parameter
Min Typ Max Unit Test Conditions/Comments
SEQ_DONE PIN
Output Low Voltage, VSEQ_DONEL
0.4 V VVCC = 2.7 V, ISINK = 2 mA
Leakage Current
1 µA SEQ_DONE = 5.5 V
VVCC That Guarantees Valid Outputs
1
V Output is guaranteed to be either low (VSEQ_DONEL = 0.4 V)
or giving a valid output level from VVCC = 1 V, ISINK = 30 µA
or VVCC = 1.1 V, ISINK = 100 µA
RESPONSE TIMING
Includes input glitch filter and all other internal
delays
VINx to PWRGD
VINx Going Low to High
21.9 28.8 35.2 µs 50 mV input overdrive
VINx Going High to Low
5.8 7.3 8.9 µs 50 mV input overdrive
VINx to FAULT, OUTx Low
VINx Going High to Low (UV Fault) 6.1 7.5 9.2 µs 50 mV input overdrive
UP, DOWN, and UP/DOWN to FAULT, 5.5 8.6 12.1 µs 100 mV input overdrive
OUTx Low, tUDOUT
5.8 7.7 10.5 µs 1 V input overdrive
External FAULT to OUTx Low
10 µs 1 V input overdrive
Fault Hold Time
35 44 54 µs UP, UP/DOWN held low
1 Input comparators do not include hysteresis on their inputs. The comparator output passes through a digital glitch filter to remove short transients from the input
signal that would otherwise drive the state machine.
Rev. B | Page 5 of 28

6 Page









ADM1186 pdf, datenblatt
Data Sheet
15.0
14.8
14.6
14.4
VCC = 3.3V
VCC = 5.5V
14.2
14.0
13.8
13.6
VCC = 2.7V
13.4
13.2
13.0
–40
–20 0
20
TEMPERATURE (°C)
40
60
Figure 17. Time Delay Charge Current vs. Temperature
1k
100
10
1
10
600
100 1k
CAPACITOR (nF)
Figure 18. Time Delay vs. Capacitor Value
10k
500
VCC = 2.7V
400
300 VCC = 3.3V
200
100 VCC = 5.5V
0
0 5 10 15 20 25
OUTPUT SINK CURRENT (mA)
Figure 19. Output Low Voltage vs. Output Sink Current
ADM1186
400
350
300
250
200
150
100
1mA
50
100µA
0
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
Figure 20. Output Low Voltage vs. Supply Voltage
5.5
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
2.7
3.2 3.7 4.2 4.7
SUPPLY VOLTAGE (V)
5.2
Figure 21. VINx to FAULT, OUTx Low Response Time vs. Supply Voltage
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
–40
–20
0
20 40 60 80
TEMPERATURE (°C)
Figure 22. VINx to FAULT, OUTx Low Response Time vs. Temperature
Rev. B | Page 11 of 28

12 Page





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