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AD5143 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD5143
Beschreibung (AD5123 / AD5143) Nonvolatile Digital Potentiometer
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 28 Seiten
AD5143 Datasheet, Funktion
Data Sheet
Quad Channel, 128-/256-Position, I2C,
Nonvolatile Digital Potentiometer
AD5123/AD5143
FEATURES
10 kΩ and 100 kΩ resistance options
Resistor tolerance: 8% maximum
Wiper current: ±6 mA
Low temperature coefficient: 35 ppm/°C
Wide bandwidth: 3 MHz
Fast start-up time < 75 μs
Linear gain setting mode
Single- and dual-supply operation
Wide operating temperature: −40°C to +125°C
3 mm × 3 mm package
4 kV ESD protection
APPLICATIONS
Portable electronics level adjustment
LCD panel brightness and contrast controls
Programmable filters, delays, and time constants
Programmable power supplies
GENERAL DESCRIPTION
The AD5123/AD5143 potentiometers provide a nonvolatile
solution for 128-/256-position adjustment applications, offering
guaranteed low resistor tolerance errors of ±8% and up to ±6 mA
current density in the Ax, Bx, and Wx pins.
The low resistor tolerance and low nominal temperature coefficient
simplify open-loop applications as well as applications requiring
tolerance matching.
The linear gain setting mode allows independent programming
of the resistance between the digital potentiometer terminals,
through the RAW and RWB string resistors, allowing very accurate
resistor matching.
The high bandwidth and low total harmonic distortion (THD)
ensure optimal performance for ac signals, making the devices
suitable for filter design.
The low wiper resistance of only 40 Ω at the ends of the resistor
array allows for pin-to-pin connection.
The wiper values can be set through an I2C-compatible digital
interface that is also used to read back the wiper register and
EEPROM contents.
The AD5123/AD5143 are available in a compact, 16-lead, 3 mm ×
3 mm LFCSP. The parts are guaranteed to operate over the extended
industrial temperature range of −40°C to +125°C.
SCL
SDA
ADDR
FUNCTIONAL BLOCK DIAGRAM
VDD
POWER-ON
RESET
AD5123/AD5143
RDAC1
INPUT
REGISTER 1
SERIAL
INTERFACE 7/8
RDAC2
INPUT
REGISTER 2
RDAC3
INPUT
REGISTER 3
RDAC4
INPUT
REGISTER 4
EEPROM
MEMORY
A1
W1
B1
A2
W2
B2
W3
B3
W4
B4
GND VSS
Figure 1.
Table 1. Family Models
Model Channel Position
AD51231 Quad
128
AD5124 Quad
128
AD5124 Quad
128
AD5143 Quad
256
AD5144 Quad
256
AD5144 Quad
256
AD5144A Quad
256
AD5122 Dual
128
AD5122A Dual
128
AD5142 Dual
256
AD5142A Dual
256
AD5121 Single 128
AD5141 Single 256
Interface
I2C
SPI/I2C
SPI
I2C
SPI/I2C
SPI
I2C
SPI
I2C
SPI
I2C
SPI/I2C
SPI/I2C
Package
LFCSP
LFCSP
TSSOP
LFCSP
LFCSP
TSSOP
TSSOP
LFCSP/TSSOP
LFCSP/TSSOP
LFCSP/TSSOP
LFCSP/TSSOP
LFCSP
LFCSP
1 Two potentiometers and two rheostats.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2012–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
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AD5143 Datasheet, Funktion
AD5123/AD5143
Data Sheet
ELECTRICAL CHARACTERISTICS—AD5143
VDD = 2.3 V to 5.5 V, VSS = 0 V; VDD = 2.25 V to 2.75 V, VSS = −2.25 V to −2.75 V; −40°C < TA < +125°C, unless otherwise noted.
Table 3.
Parameter
DC CHARACTERISTICS—RHEOSTAT
MODE (ALL RDACs)
Resolution
Resistor Integral Nonlinearity2
Resistor Differential Nonlinearity2
Nominal Resistor Tolerance
Resistance Temperature Coefficient3
Wiper Resistance3
Bottom Scale or Top Scale
Nominal Resistance Match
DC CHARACTERISTICS—POTENTIOMETER
DIVIDER MODE (ALL RDACs)
Integral Nonlinearity4
Differential Nonlinearity4
Full-Scale Error
Zero-Scale Error
Voltage Divider Temperature
Coefficient3
Symbol
Test Conditions/Comments
N
R-INL
R-DNL
ΔRAB/RAB
(ΔRAB/RAB)/ΔT × 106
RW
RBS or RTS
RAB1/RAB2
RAB = 10 kΩ
VDD ≥ 2.7 V
VDD < 2.7 V
RAB = 100 kΩ
VDD ≥ 2.7 V
VDD < 2.7 V
Code = full scale
Code = zero scale
RAB = 10 kΩ
RAB = 100 kΩ
RAB = 10 kΩ
RAB = 100 kΩ
Code = 0xFF
INL
DNL
VWFSE
VWZSE
(ΔVW/VW)/ΔT × 106
RAB = 10 kΩ
RAB = 100 kΩ
RAB = 10 kΩ
RAB = 100 kΩ
RAB = 10 kΩ
RAB = 100 kΩ
Code = half scale
Min
8
−2
−5
−1
−2
−0.5
−8
−1
−1
−0.5
−0.5
−2.5
−1
Typ1 Max
±0.2 +2
±1.5 +5
±0.1 +1
±0.5 +2
±0.2 +0.5
±1 +8
35
55 125
130 400
40 80
60 230
±0.2 +1
±0.2 +1
±0.1 +0.5
±0.2 +0.5
−0.1
±0.2 +1
1.2 3
0.5 1
±5
Unit
Bits
LSB
LSB
LSB
LSB
LSB
%
ppm/°C
%
LSB
LSB
LSB
LSB
LSB
LSB
LSB
ppm/°C
Rev. A | Page 6 of 28
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AD5143 pdf, datenblatt
AD5123/AD5143
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Data Sheet
A1 1
W1 2
B1 3
W3 4
PIN 1
INDICATOR
AD5123/
AD5143
TOP VIEW
(Not to Scale)
12 VDD
11 B4
10 W4
9 B2
NOTES
1. INTERNALLY CONNECT THE
EXPOSED PAD TO VSS.
Figure 4. Pin Configuration
Table 7. Pin Function Descriptions
Pin No. Mnemonic
Description
1 A1
2 W1
Terminal A of RDAC1. VSS ≤ VA ≤ VDD.
Wiper Terminal of RDAC1. VSS ≤ VW ≤ VDD.
3 B1
Terminal B of RDAC1. VSS ≤ VB ≤ VDD.
4 W3
Wiper Terminal of RDAC3. VSS ≤ VW ≤ VDD.
5 B3
6 VSS
7 A2
8 W2
Terminal B of RDAC3. VSS ≤ VB ≤ VDD.
Negative Power Supply. Decouple this pin with 0.1 µF ceramic capacitors and 10 µF capacitors.
Terminal A of RDAC2. VSS ≤ VA ≤ VDD.
Wiper Terminal of RDAC2. VSS ≤ VW ≤ VDD.
9 B2
Terminal B of RDAC2. VSS ≤ VB ≤ VDD.
10 W4
Wiper Terminal of RDAC4. VSS ≤ VW ≤ VDD.
11 B4
Terminal B of RDAC4. VSS ≤ VB ≤ VDD.
12 VDD
Positive Power Supply. Decouple this pin with 0.1 µF ceramic capacitors and 10 µF capacitors.
13 SCL
Serial Clock Line. Data is clocked in at the logic low transition.
14 SDA
Serial Data Input/Output.
15 ADDR
Programmable Address for Multiple Package Decoding.
16 GND
Ground Pin, Logic Ground Reference.
EPAD
Internally Connect the Exposed Paddle to VSS.
Rev. A | Page 12 of 28
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