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GM5822H Schematic ( PDF Datasheet ) - Genesis

Teilenummer GM5822H
Beschreibung (GM5822H / GM5862H) highly integrated mixed signal LCD controller
Hersteller Genesis
Logo Genesis Logo 




Gesamt 58 Seiten
GM5822H Datasheet, Funktion
gm5862H/gm5822H
PRELIMINARY Datasheet
Ordering Information
Part Number
gm5862H-LF(1)
gm5822H-LF
Output
Resolution
WUXGA
(1920x1200)
WSXGA+
(1680x1050)
Package
256-pin PQFP
Lead Free
Note (1): HDCP enabled parts are only sold to HDCP licensed customers.
Temperature Range
0-70°C
GENESIS MICROCHIP CONFIDENTIAL
P/N C5862-DAT-01C
www.gnss.com
Copyright ©2006 Genesis Microchip Inc. All rights reserved. Including the right of reproduction in whole or in part in any form.
Even though Genesis Microchip Inc. has reviewed this publication, GENESIS MICROCHIP INC. MAKES NO WARRANTY OR REPRESENTATION, EITHER EXPRESS
OR IMPLIED, WITH RESPECT TO THIS PUBLICATION, ITS QUALITY, ACCURACY, NONINFRINGMENT, MERCHANTABILITY, OR FITNESS FOR A
PARTICULAR PURPOSE. AS A RESULT, THIS PUBLICATION IS PROVIDED “AS IS” AND THE READER ASSUMES THE RISK AS TO ITS QUALITY,
ACCURACY, OR SUITABILITY FOR ANY PARTICULAR PURPOSE.
IN NO EVENT WILL GENESIS MICROCHIP INC. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES RESULTING
FROM ANY DEFECT OR INACCURACY IN THIS PUBLICATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
This publication is provided with RESTRICTED RIGHTS. Use, duplication, or disclosure by the government are subject to restrictions set forth in DFARS 252.277-7013 or 48
CFR 52.227-19 as applicable.
The Genesis logo is a trademark of Genesis Microchip Inc. All other marks, brands and product names are the property of their respective owners.
Free Datasheet http://www.datasheet4u.com/






GM5822H Datasheet, Funktion
GENESIS MICROCHIP
gm5862H/gm5822H PRELIMINARY Datasheet
1.2 Features
DUAL ANALOG INPUT
ƒ Operation up to 205MHz
ƒ Dual RGB inputs
ƒ Single RGB & single YPbPr up to 1080i inputs
ƒ Bi-level and tri-level analog sync support and
Macrovision support
ƒ Dual HSYNC, VSYNC and SOG inputs
ULTRA-RELIABLE DVI INPUT
ƒ Operation up to 165MHz
ƒ Direct connect to all DVI compliant digital
transmitters
ƒ High-bandwidth Digital Content Protection
DIGITAL VIDEO INPUT
ƒ ITU656 video input support for direct connect to
commercially available video decoder
ƒ ITU601 (16-bit) video input support for external
MPEG2 decoder, DVI Rx and ADC
HIGH QUALITY ADVANCED SCALING
ENGINE
ƒ Independent and programmable H & V scaling
factors
ƒ Panoramic scaling (non-linear)
ƒ Variable Sharpness Settings
PICTURE-IN-PICTURE (PIP)
ƒ Variable PIP window size up to 640x480
ƒ Side by side widow up to 960x600
ƒ Video PIP on Graphics/Graphics PIP on Video
ƒ Independent PIP window color controls
ADVANCED DIGITAL COLOR CONTROLS
ƒ Adaptive Contrast and Color and Active Color
Management Three Dimension
FRAME RATE CONVERSION (FRC)
ƒ 16-bit/32-bit data path to support single or dual
1Mx16 SDR SDRAM
ƒ Full frame rate conversion up to SXGA 75Hz
RESPONSE TIME COMPENSATION
ƒ Compensates motion blur that results from slow
response time of LCD panels – resulting in
motion image that is clean and crisp
OSD CONTROLLER
ƒ Up to 4 windows: 1, 2 or 4-bits per pixel color
ƒ Blinking, transparency, blending and proportional
fonts support
OUTPUT SUPPORT
ƒ Dual Channel LVDS Transmitters with pin swap
for flexibility in PCB layout
ƒ Optional 24-bit TTL
SYSTEM-ON-CHIP INTEGRATION FOR
LOWER BOM
ƒ On-chip reset circuit with Integrated Schmitt
trigger for HSYNC and VSYNC
ƒ Embedded x86 MCU with serial interface
ƒ General Purpose Low Bandwidth ADC
ƒ Integrated gamma and 3x3 LUT for sRGB
compliance
ƒ ESM® and Boundary Scan Support
 
C5862-DAT-01C
Genesis Microchip CONFIDENTIAL
6
Free Datasheet http://www.datasheet4u.com/

6 Page









GM5822H pdf, datenblatt
GENESIS MICROCHIP
gm5862H/gm5822H PRELIMINARY Datasheet
Table 8: Digital Power and Ground
Pad Name
RVDD_3.3
CVDD_1.8
CRVSS
Pin I/O Description
7 P Ring VDD, 3.3V. All power pins must be bypassed to system ground with a 0.1uF ceramic
26 capacitor placed in close proximity of the pin.
35
46
65
114
151
161
167
224
247
30 P Core VDD, 1.8V. All power pins must be bypassed to system ground with a 0.1uF ceramic
66 capacitor placed in close proximity of the pin.
113
123
170
213
235
246
1 G Ring/Core shared VSS. Tie directly to the system ground.
14
25
34
47
57
67
73
78
112
124
150
156
162
171
212
225
236
245
Table 9: System Interface
Pad Name
PPWR
Pin
79
PBIAS
80
GPIO_10/B4
GPIO_11/B5
GPIO_12/B6
GPIO_13/B7
GPIO_14/DCLK
GPIO_15/DEN
GPIO_16/DHS
108
109
110
111
115
116
117
GPIO_17/DVS
118
GPIO_18/ SCL_0(2W_Mst) 119
GPIO_19/SDA_0(2W_Mst)
120
I/O Description
O Panel Power Control. To be used with PBIAS for correct power up/down sequencing
(timing is user programmable). [Tri-state output]
O Panel Bias Control (backlight enable). To be used with PPWR for correct power
up/down sequencing (timing is user programmable). [Tri-state output]
IO GPIO_10; shared with LVTTL Display Port Blue 4; [5V-tolerant, internal pull-down]
IO GPIO_11; shared with LVTTL Display Port Blue 5; [5V-tolerant, internal pull-down]
IO GPIO_12; shared with LVTTL Display Port Blue 6; [5V-tolerant, internal pull-down]
IO GPIO_13; shared with LVTTL Display Port Blue 7; [5V-tolerant, internal pull-down]
IO GPIO_14; shared with LVTTL Display Port DCLK; [5V-tolerant, internal pull-down]
IO GPIO_15; shared with LVTTL Display Port DEN; [5V-tolerant, internal pull-down]
IO GPIO_16; shared with LVTTL Display Port DHS
[5V-tolerant, internal pull-down]
IO GPIO_17; shared with LVTTL Display Port DVS
[5V-tolerant, internal pull-down]
IO GPIO_18; shared with TWO_WIRE Master_0 Clock
[Schmitt trigger, 5V-tolerant]
IO GPIO_19; shared with TWO_WIRE Master_0 Data
[Schmitt trigger, 5V-tolerant]
C5862-DAT-01C
Genesis Microchip CONFIDENTIAL
12
Free Datasheet http://www.datasheet4u.com/

12 Page





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