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ADG5423 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADG5423
Beschreibung (ADG5421 / ADG5423) Dual SPST Switches
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 20 Seiten
ADG5423 Datasheet, Funktion
Data Sheet
FEATURES
Latch-up immune under all circumstances
Human body model (HBM) ESD rating: 8 kV
Low on resistance: 13.5 Ω
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
VDD to VSS analog signal range
APPLICATIONS
High voltage signal routing
Automatic test equipment
Analog front-end circuits
Precision data acquisition
Industrial instrumentation
Amplifier gain select
Relay replacement
GENERAL DESCRIPTION
The ADG5421/ADG5423 are monolithic industrial,
complementary metal oxide semiconductor (CMOS) analog
switches containing two independent latch-up immune single-
pole/single-throw (SPST) switches. Each switch conducts
equally well in both directions when on, and has an input signal
range that extends to the power supplies. In the off condition,
signal levels up to the supplies are blocked. Both ADG5421
switches are turned on with a Logic 1 input, whereas the
ADG5423 has one switch turned on and one switch turned off
for a Logic 1 input. The ADG5423 exhibits break-before-make
action for use in multiplexer applications.
The ultralow on resistance and on-resistance flatness of these
switches make them ideal solutions for data acquisition and gain
switching applications where low distortion is critical. The
latch-up immune construction and high ESD rating make these
switches more robust in harsh environments.
High Voltage Latch-Up Proof,
Dual SPST Switches
ADG5421/ADG5423
FUNCTIONAL BLOCK DIAGRAMS
ADG5421
S1
IN1
D1
D2
IN2
S2
SWITCHES SHOWN FOR A LOGIC 0 INPUT
Figure 1. ADG5421
ADG5423
S1
IN1
D1
D2
IN2
S2
SWITCHES SHOWN FOR A LOGIC 0 INPUT
Figure 2. ADG5423
PRODUCT HIGHLIGHTS
1. Trench isolation guards against latch-up. A dielectric trench
separates the P channel and N channel transistors, thereby
preventing latch-up even under severe overvoltage
conditions.
2. Low RON of 13.5 Ω.
3. Dual-supply operation. For applications where the analog
signal is bipolar, the ADG5421/ADG5423 can operate
from dual supplies up to ±22 V.
4. Single-supply operation. For applications where the analog
signal is unipolar, the ADG5421/ADG5423 can operate from
a single-rail power supply up to 40 V.
5. 3 V logic compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V.
6. No VL logic power supply required.
7. Available in 10-lead MSOP package.
Rev. 0
Document Feedback
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responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2013 Analog Devices, Inc. All rights reserved.
Technical Support
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ADG5423 Datasheet, Funktion
Data Sheet
ADG5421/ADG5423
36 V SINGLE SUPPLY
VDD = 36 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 4.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On-Resistance Match Between
Channels, ∆RON
On-Resistance Flatness, RFLAT (ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
25°C −40°C to +85°C
14.5
16 20
0.1
0.8 1.3
3.5
4.3 5.5
±0.05
−40°C to +125°C
0 V to VDD
24
1.4
6.5
Drain Off Leakage, ID (Off)
±0.25
±0.05
±1
±10
Channel On Leakage, ID (On), IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
±0.25
±0.1
±0.4
0.002
±1
±4
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
tOFF
Break-Before-Make Time Delay, tD
(ADG5423 Only)
6
181
210
170
192
66
245
205
Charge Injection, QINJ
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise
110
−55
−85
0.01
±10
±20
2.0
0.8
±0.1
280
220
37
−3 dB Bandwidth
Insertion Loss
260
−0.9
CS (Off)
CD (Off)
CD (On), CS (On)
POWER REQUIREMENTS
IDD
VDD
13
16
38
80
100
1 Guaranteed by design; not subject to production test.
130
9/40
Unit Test Conditions/Comments
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
VS = 0 V to 30 V, IS = −10 mA; see Figure 24
VDD = 32.4 V, VSS = 0 V
VS = 0 V to 30 V, IS = −10 mA
VS = 0 V to 30 V, IS = −10 mA
VDD = 39.6 V, VSS = 0 V
VS = 1 V to 30 V, VD = 30 V to 1 V; see
Figure 23
VS = 1 V to 30 V, VD = 30 V to 1 V; see
Figure 23
VS = VD = 1 V to 30 V; see Figure 22
V min
V max
µA typ
µA max
pF typ
VIN = VGND or VDD
ns typ
ns max
ns typ
ns max
ns typ
RL = 300 Ω, CL = 35 pF
VS = 18 V; see Figure 29
RL = 300 Ω, CL = 35 pF
VS = 18 V; see Figure 29
RL = 300 Ω, CL = 35 pF
ns min
pC typ
dB typ
dB typ
% typ
MHz typ
dB typ
pF typ
pF typ
pF typ
µA typ
µA max
V min/V max
VS1 = VS2 = 18 V; see Figure 31
VS = 18 V, RS = 0 Ω, CL = 1 nF; see Figure 30
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 25
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 28
RL = 1 kΩ, 18 V p-p, f = 20 Hz to 20 kHz;
see Figure 26
RL = 50 Ω, CL = 5 pF; see Figure 27
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 27
VS = 18 V, f = 1 MHz
VS = 18 V, f = 1 MHz
VS = 18 V, f = 1 MHz
VDD = 39.6 V
Digital inputs = 0 V or VDD
GND = 0 V, VSS = 0 V
Rev. 0 | Page 6 of 20
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ADG5423 pdf, datenblatt
ADG5421/ADG5423
0
TA = 25°C
–10 VDD = +15V
VSS = –15V
–20
–30
–40
–50
–60
–70
–80
–90
–100
1k
10k 100k 1M 10M 100M
FREQUENCY (Hz)
Figure 16. Off Isolation vs. Frequency
1G
0
TA = 25°C
VDD = +15V
–20 VSS = –15V
–40
–60
–80
–100
–120
10k
100k 1M 10M 100M
FREQUENCY (Hz)
Figure 17. Crosstalk vs. Frequency
1G
300
VDD = 15V, VSS = –15V
VDD = 20V, VSS = –20V
250 VDD = 12V, VSS = 0V
VDD = 36V, VSS = 0V
200
150
100
50
0
–20 –10 0 10 20 30
VS (V)
Figure 18. Charge Injection vs. Source Voltage (VS)
40
Data Sheet
0.05
TA = 25°C
0.04
0.03
VDD = 12V, VSS = 0V, VS = 6V p-p
VDD = 36V, VSS = 0V, VS = 18V p-p
VDD = 15V, VSS = –15V, VS = 15V p-p
VDD = 20V, VSS = –20V, VS = 20V p-p
0.02
0.01
0
0 5 10 15
FREQUENCY (kHz)
Figure 19. THD + N vs. Frequency
20
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
–4.5
–5.0
1k
TA = 25°C
VDD = +15V
VSS = –15V
10k 100k 1M 10M
FREQUENCY (Hz)
Figure 20. Bandwidth
100M
1G
400
VDD = 12V, VSS = 0V
350 VDD = 36V, VSS = 0V
VDD = 15V, VSS = –15V
300 VDD = 20V, VSS = –20V
250
200
150
100
50
0
–40 –20
0
20 40 60 80 100 120
TEMPERATURE (°C)
Figure 21. tTRANSITION Times vs. Temperature
Rev. 0 | Page 12 of 20
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