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PDF PBSS4130PAN Data sheet ( Hoja de datos )

Número de pieza PBSS4130PAN
Descripción NPN/NPN low VCEsat (BISS) transistor
Fabricantes NXP Semiconductors 
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PBSS4130PAN
30 V, 1 A NPN/NPN low VCEsat (BISS) transistor
11 January 2013
Product data sheet
1. General description
NPN/NPN low VCEsat Breakthrough In Small Signal (BISS) transistor in a leadless
medium power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package.
NPN/PNP complement: PBSS4130PANP. PNP/PNP complement: PBSS5130PAP.
2. Features and benefits
Very low collector-emitter saturation voltage VCEsat
High collector current capability IC and ICM
High collector current gain hFE at high IC
Reduced Printed-Circuit Board (PCB) requirements
High energy efficiency due to less heat generation
AEC-Q101 qualified
3. Applications
Load switch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Per transistor
VCEO
collector-emitter
voltage
IC collector current
ICM peak collector current
Per transistor
RCEsat
collector-emitter
saturation resistance
Conditions
open base
single pulse; tp ≤ 1 ms
IC = 1 A; IB = 0.1 A; pulsed; tp ≤ 300 µs;
δ ≤ 0.02 ; Tamb = 25 °C
Min Typ Max Unit
- - 30 V
- - 1A
- - 2A
- - 190 mΩ
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PBSS4130PAN pdf
NXP Semiconductors
PBSS4130PAN
30 V, 1 A NPN/NPN low VCEsat (BISS) transistor
Symbol
Per device
Rth(j-a)
Parameter
thermal resistance
from junction to
ambient
Conditions
in free air
Min Typ Max Unit
[1] - - 245 K/W
[2] - - 160 K/W
[3] - - 171 K/W
[4] - - 130 K/W
[5] - - 202 K/W
[6] - - 120 K/W
[7] - - 130 K/W
[8] - - 63 K/W
[1] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated, mounting pad for
collector 1 cm2.
[3] Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated and standard footprint.
[4] Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm2.
[5] Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated and standard footprint.
[6] Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated, mounting pad for
collector 1 cm2.
[7] Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated and standard footprint.
[8] Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated, mounting pad for collector 1 cm2.
103 006aad166
Zth(j-a)
(K/W)
102
duty cycle = 1
0.75
0.5
0.33
0.2
0.1
0.05
10
0.02
0.01
0
1
10-5
10-4
10-3
10-2
FR4 PCB 35 µm, standard footprint
10-1
1
10 102 103
tp (s)
Fig. 2. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4130PAN
Product data sheet
All information provided in this document is subject to legal disclaimers.
11 January 2013
© NXP B.V. 2013. All rights reserved
5 / 17
Free Datasheet http://www.datasheet4u.com/

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PBSS4130PAN arduino
NXP Semiconductors
PBSS4130PAN
30 V, 1 A NPN/NPN low VCEsat (BISS) transistor
1.2
VBE
(V)
0.8
0.4
(1)
(2)
(3)
006aad174
1.2
VBEsat
(V)
1.0
0.8
0.6
0.4
006aad175
(1)
(2)
(3)
0
10-1
1
10 102 103 104
IC (mA)
VCE = 2 V
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 12. Base-emitter voltage as a function of collector
current; typical values
1 006aad176
0.2
10-1
1
10 102 103 104
IC (mA)
IC/IB = 20
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb= 100 °C
Fig. 13. Base-emitter saturation voltage as a function of
collector current; typical values
1 006aad177
VCEsat
(V)
VCEsat
(V)
10-1
10-2
(1)
(2)
(3)
10-1
10-2
(1)
(2)
(3)
10-3
10-1
1
10 102 103 104
IC (mA)
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig. 14. Collector-emitter saturation voltage as a
function of collector current; typical values
10-3
10-1
1
10 102 103 104
IC (mA)
Tamb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig. 15. Collector-emitter saturation voltage as a
function of collector current; typical values
PBSS4130PAN
Product data sheet
All information provided in this document is subject to legal disclaimers.
11 January 2013
© NXP B.V. 2013. All rights reserved
11 / 17
Free Datasheet http://www.datasheet4u.com/

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