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PDF RT7272A Data sheet ( Hoja de datos )

Número de pieza RT7272A
Descripción Synchronous Step-Down Converter
Fabricantes Richtek 
Logotipo Richtek Logotipo



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®
RT7272A
3A, 36V, 500kHz Synchronous Step-Down Converter
General Description
The RT7272A is a high efficiency, current mode
synchronous step-down DC/DC converter that can deliver
up to 3A output current over a wide input voltage range
from 4.5V to 36V. The device integrates a 150mΩ high
side and a 80mΩ low side MOSFET to achieve high
conversion efficiency up to 95%. The current mode control
architecture supports fast transient response and simple
compensation circuit.
A cycle-by-cycle current limit function provides protection
against shorted output and an internal soft-start eliminates
input current surge during start-up. The RT7272A provides
complete protection functions such as input under voltage
lockout, output under voltage protection, over current
protection and thermal shutdown.
The RT7272A is available in the thermal enhanced SOP-8
(Exposed Pad) package.
Ordering Information
RT7272A
Package Type
SP : SOP-8 (Exposed Pad-Option 2)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Features
z 4.5V to 36V Input Voltage Range
z 3A Output Current
z Internal N-MOSFETs
z Current Mode Control
z Fixed Frequency Operation : 500kHz
z Adjustable Output Voltage from 0.8V to 30V
z High Efficiency Up to 95%
z Stable with Low ESR Ceramic Output Capacitors
z Cycle-by-Cycle Current Limit
z Input Under Voltage Lockout
z Output Under Voltage Protection
z Thermal Shutdown Protection
z Adjustable Current Limit
z RoHS Compliant and Halogen Free
Applications
z Distributed Power Systems
z Pre-Regulator for Linear Regulators
z Notebook Computers
z Point of Load Regulator in Distributed Power System
z Digital Set-top Boxes
z Personal Digital Recorders
z Broadband Communications
z Flat Panel TVs and Monitors
z Vehicle Electronics
Simplified Application Circuit
VIN
CIN
RL
VIN BOOT
RT7272A
SW
CB L
RLIM
GND
FB
COMP
CC RC
VOUT
R1
COUT
R2
Copyright ©2013 Richtek Technology Corporation. All rights reserved.
DS7272A-01 January 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
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RT7272A pdf
RT7272A
Parameter
Oscillation Frequency
Short Circuit Oscillation
Frequency
Maximum Duty Cycle
Minimum On-Time
EN Input Voltage
Logic-High
Logic-Low
Input Under Voltage Lockout
Threshold
Input Under Voltage Lockout
Hysteresis
Thermal Shutdown
Thermal Shutdown Hysteresis
COMP to Current Sense
Transconductance
Error Amplifier Transconductance
Symbol
fOSC1
fOSC2
DMAX
tON
VIH
VIL
VUVLO
ΔVUVLO
TSD
ΔTSD
GCS
GEA
Test Conditions
VFB = 0V
VFB = 0.7V
VIN Rising
ΔICOMP = ±10μA
Min Typ Max Unit
450 500 550 kHz
-- 75 -- kHz
-- 90 -- %
-- 100 --
ns
2 -- --
V
-- -- 0.4
3.9 4.1 4.3
V
-- 250 -- mV
-- 150 --
-- 20 --
°C
°C
-- 4.7 -- A/V
-- 1000 -- μA/V
Note 1. Stresses beyond those listed Absolute Maximum Ratingsmay cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. RLIM (kΩ) = [UOC x 24.14 x (1 + 0.024 x (UOC 3.5)) 1.3], where UOC is desired upper switch peak current limit
value.
Copyright ©2013 Richtek Technology Corporation. All rights reserved.
DS7272A-01 January 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
Free Datasheet http://www.datasheet4u.com/

5 Page





RT7272A arduino
RT7272A
The output ripple will be the highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement. Higher values,
lower cost ceramic capacitors are now becoming available
in smaller case sizes. Their high ripple current, high voltage
rating and low ESR make them ideal for switching regulator
applications. However, care must be taken when these
capacitors are used at input and output. When a ceramic
capacitor is used at the input and the power is supplied
by a wall adapter through long wires, a load step at the
output can induce ringing at the input, VIN. At best, this
ringing can couple to the output and be mistaken as loop
instability. At worst, a sudden inrush of current through
the long wires can potentially cause a voltage spike at
VIN large enough to damage the part.
Thermal Considerations
For continuous operation, do not exceed the maximum
operation junction temperature 125°C. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = (TJ(MAX) TA ) / θJA
Where TJ(MAX) is the maximum operation junction
temperature , TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT7272A, the maximum junction temperature is 125°C.
The junction to ambient thermal resistance θJA is layout
dependent. For SOP-8 (Exposed Pad) package, the
thermal resistance θJA is 75°C/W on the standard JEDEC
51-7 four-layers thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by following
formula :
PD(MAX) = (125°C 25°C) / (75°C/W) = 1.333W
(min.copper area PCB layout)
PD(MAX) = (125°C 25°C) / (49°C/W) = 2.04W
(70mm2copper area PCB layout)
The thermal resistance θJA of SOP-8 (Exposed Pad) is
determined by the package architecture design and the
PCB layout design. However, the package architecture
design had been designed. If possible, it's useful to
increase thermal performance by the PCB layout copper
design. The thermal resistance θJA can be decreased by
adding copper area under the exposed pad of SOP-8
(Exposed Pad) package.
As shown in Figure 6, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard
SOP-8 (Exposed Pad) pad (Figure 6.a), θJA is 75°C/W.
Adding copper area of pad under the SOP-8 (Exposed
Pad) (Figure 6.b) reduces the θJA to 64°C/W. Even further,
increasing the copper area of pad to 70mm2 (Figure 6.e)
reduces the θJA to 49°C/W.
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA. The Figure 7 of derating curves allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation allowed.
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
Four-Layer PCB
Copper Area
70mm2
50mm2
30mm2
10mm2
Min.Layout
25 50 75 100
Ambient Temperature (°C)
125
Figure 7. Derating Curve of Maximum Power Dissipation
Copyright ©2013 Richtek Technology Corporation. All rights reserved.
DS7272A-01 January 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
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