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PDF RJK03C5DPA Data sheet ( Hoja de datos )
| Número de pieza | RJK03C5DPA | |
| Descripción | Built in SBD N Channel Power MOS FET | |
| Fabricantes | Renesas | |
| Logotipo |  |
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RJK03C5DPA
30V, 50A, 2.9m max.
Built in SBD N Channel Power MOS FET
High Speed Power Switching
Features
High speed switching
Capable of 4.5 V gate drive
Low drive current
High density mounting
Low on-resistance
Pb-free
Halogen-free
Outline
Preliminary Datasheet
R07DS0940EJ0400
Rev.4.00
Mar 22, 2013
RENESAS Package code: PWSN0008DE-A
(Package name: WPAK(3F))
5678
5 678
D DDD
4321
4
G
1, 2, 3 Source
4 Gate
5, 6, 7, 8 Drain
S SS
1 23
Absolute Maximum Ratings
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
Channel to case thermal impedance
Channel temperature
Storage temperature
Notes: 1. PW 10 s, duty cycle 1%
2. Value at Tch = 25C, Rg 50
3. Tc = 25C
Symbol
VDSS
VGSS
ID
ID(pulse)Note1
IDR
IAP Note 2
EAR Note 2
Pch Note3
ch-c Note3
Tch
Tstg
Ratings
30
±20
50
200
50
20
40
50
2.5
150
–55 to +150
(Ta = 25°C)
Unit
V
V
A
A
A
A
mJ
W
C/W
C
C
R07DS0940EJ0400 Rev.4.00
Mar 22, 2013
Page 1 of 6
Free Datasheet http://www.datasheet4u.com/
1 page  
RJK03C5DPA
3
Normalized Transient Thermal Impedance vs. Pulse Width
Preliminary
Vin
15 V
1
D=1
0.5
0.3
0.2
0.1 0.1
0.05
0.03
0.02
0.011shot
pulse
0.01
10 μ
100 μ
θch − c(t) = γs (t) • θch − c
θch − c = 2.5°C/W, Tc = 25°C
PDM
D=
PW
T
PW
T
1m
10 m
100 m
1
10
Pulse Width PW (S)
Avalanche Test Circuit
VDS
Monitor
Rg
L
IAP
Monitor
D. U. T
VDD
Avalanche Waveform
EAR =
1
2
L • IAP2 •
VDSS
VDSS – VDD
IAP
ID
V(BR)DSS
VDS
VDD
0
Switching Time Test Circuit
Vin Monitor
Rg
D.U.T.
Vout
Monitor
RL
Vin
10 V
VDS
= 10 V
Switching Time Waveform
90%
Vin
Vout
10%
10%
10%
90%
90%
td(on)
tr td(off)
tf
R07DS0940EJ0400 Rev.4.00
Mar 22, 2013
Page 5 of 6
Free Datasheet http://www.datasheet4u.com/
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet RJK03C5DPA.PDF ] | |
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