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ADG1212-EP Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADG1212-EP
Beschreibung iCMOS Quad SPST Switches
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 12 Seiten
ADG1212-EP Datasheet, Funktion
Enhanced Product
Low Capacitance, Low Charge Injection,
±15 V/+12 V iCMOS Quad SPST Switches
ADG1212-EP
FEATURES
1 pF off capacitance
2.6 pF on capacitance
<1 pC charge injection
33 V supply range
120 Ω on resistance
Fully specified at ±15 V, +12 V
No VL supply required
3 V logic-compatible inputs
Rail-to-rail operation
16-lead TSSOP
Typical power consumption: <0.03 μW
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications (AQEC
standard)
Military temperature range: −55°C to +125°C
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Video signal routing
Communication systems
GENERAL DESCRIPTION
The ADG1212-EP is a monolithic complementary metal-oxide
semiconductor (CMOS) device containing four independently
selectable switches designed on an iCMOS® (industrial CMOS)
process. iCMOS is a modular manufacturing process combining
high voltage CMOS and bipolar technologies. It enables the
development of a wide range of high performance analog ICs
capable of 33 V operation in a footprint that no previous generation
of high voltage parts has been able to achieve. Unlike analog
ICs using conventional CMOS processes, iCMOS components
can tolerate high supply voltages while providing increased
performance, dramatically lower power consumption, and
reduced package size.
FUNCTIONAL BLOCK DIAGRAM
S1
IN1
D1
S2
IN2
ADG1212-EP D2
S3
IN3
D3
S4
IN4
D4
NOTES
1. SWITCHES SHOWN ARE
FOR LOGIC 1 INPUT.
Figure 1.
The ultralow capacitance and charge injection of this switch
makes it an ideal solution for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed coupled with high signal bandwidth makes
the part suitable for video signal switching.
iCMOS construction ensures ultralow power dissipation, making
the part ideally suited for portable and battery-powered instruments.
The ADG1212-EP contains four independent single-pole/
single-throw (SPST) switches. Each switch conducts equally
well in both directions when on and has an input signal range
that extends to the supplies. In the off condition, signal levels up
to the supplies are blocked.
Additional application and technical information can be found
in the ADG1212 data sheet.
PRODUCT HIGHLIGHTS
1. Ultralow capacitance.
2. <1 pC charge injection.
3. 3 V logic compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V.
4. No VL logic power supply required.
5. Ultralow power dissipation: <0.03 μW.
6. 16-lead TSSOP package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
Free Datasheet http://www.datasheet4u.com/






ADG1212-EP Datasheet, Funktion
ADG1212-EP
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IN1 1
16 IN2
D1 2
15 D2
S1 3
14 S2
ADG1212-EP
VSS 4
TOP VIEW 13 VDD
GND 5 (Not to Scale) 12 NC
S4 6
11 S3
D4 7
10 D3
IN4 8
9 IN3
NOTES
1. NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
1 IN1
2 D1
3 S1
4 VSS
5 GND
6 S4
7 D4
8 IN4
9 IN3
10 D3
11 S3
12 NC
13 VDD
14 S2
15 D2
16 IN2
Description
Logic Control Input.
Drain Terminal. This pin can be an input or output.
Source Terminal. This pin can be an input or output.
Most Negative Power Supply Potential.
Ground (0 V) Reference.
Source Terminal. This pin can be an input or output.
Drain Terminal. This pin can be an input or output.
Logic Control Input.
Logic Control Input.
Drain Terminal. This pin can be an input or output.
Source Terminal. This pin can be an input or output.
No Connection.
Most Positive Power Supply Potential.
Source Terminal. This pin can be an input or output.
Drain Terminal. This pin can be an input or output.
Logic Control Input.
Enhanced Product
Rev. 0 | Page 6 of 12
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ADG1212-EP pdf, datenblatt
ADG1212-EP
NOTES
Enhanced Product
©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10012-0-11/11(0)
Rev. 0 | Page 12 of 12
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