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Número de pieza | AA150XT11 | |
Descripción | Display Module | |
Fabricantes | Mitsubishi | |
Logotipo | ||
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No Preview Available ! TENTATIVE
All information in this technical data sheet is tentative
and subject to change without notice.
15.0”XGA
TECHNICAL SPECIFICATION
http://www.DataSheet4U.com/
AA150XT11
MITSUBISHI ELECTRIC Corp.
MITSUBISHI Confidential
(1/26)
Date: Jun.9,’09
AA150XT11_02_00
1 page 3. ABSOLUTE MAXIMUM RATINGS
ITEM
SYMBOL
MIN.
MAX.
UNIT
Power Supply Voltage for LCD
VCC
0
4.0
V
Logic Input Voltage
Backlight (LED) Current
VI
−0.3 VCC+0.3
V
IF 0 180 mA
Operation Temperature (Panel)
Note 1,2)
Top(Panel)
−20
70
°C
Operation Temperature (Ambient) Note 2)
Top(Ambient)
−20
70
°C
Storage Temperature
Note 2)
Tstg
−20
80
°C
[Note]
1) Measured at the center of active area and at the center of panel back surface
2) Top,Tstg ≤ 40°C : 90%RH max. without condensation
Top,Tstg > 40°C : Absolute humidity shall be less than the value of 90%RH at 40°C without
condensation.
4. ELECTRICAL CHARACTERISTICS
(1) TFT- LCD
ITEM
SYMBOL MIN. TYP.
Power Supply Voltage for LCD
VCC
3.0 3.3
Power Supply Current for LCD
ICC
-- 410
Permissive Input Ripple Voltage VRP -- --
Logic Input Voltage
High
Low
VIH
VIL
2.4
0
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--
--
*1) Power and signals sequence:
Ambient Temperature : Ta = 25°C
MAX. UNIT
Remarks
3.6 V
*1)
700 mA
*2)
100 mVp-p VCC = +3.3 V
VCC V MODE, SC
0.8 V MODE, SC
t1 ≤ 10 ms
0 < t2 ≤ 50 ms
0 < t3 ≤ 50 ms
200 ms ≤ t4
200 ms ≤ t5
0 ≤ t6
0.9VCC
LCD Power Supply
Logic Signal
0.1VCC
VCC
data
0.9VCC
0.1VCC 0.1VCC
t1 t2
t3 t4
Backlight Power Supply
t5 t6
data: RGB DATA, DCLK, DENA, MODE, SC
MITSUBISHI Confidential
(5/26)
AA150XT11_02_00
5 Page 6. INTERFACE TIMING
LVDS transmitter input signal
(1) Timing Specifications
ITEM
SYMBOL MIN.
TYP.
MAX.
UNIT
Frequency
DCLK Period
fCLK
50
65
80 MHz
tCLK
12.5
15.4
20
ns
Active Time
tHA
1024
1024
1024
tCLK
Horizontal Blanking Time
tHB
20
320
--
tCLK
Frequency
fH 42.4 48.4 60 kHz
DENA
Period
tH 16.6 20.7 23.6
Active Time tVA 768 768 768
μs
tH
Vertical Blanking Time
tVB
3
38
--
tH
Frequency
fV 55 60 75 Hz
Period
tV 13.3 16.7 18.2 ms
[Note]
1) DENA (Data Enable) shall always be positive polarity as shown in the timing specification.
2) DCLK shall appear during all invalid period.
3) LVDS timing follows the timing specifications of LVDS receiver IC: THC63LVDF84B(Thine).
4) In case of blanking time fluctuation, please satisfy following condition.
tVBn > tVBn-1 − 3(tH)
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MITSUBISHI Confidential
(11/26)
AA150XT11_02_00
11 Page |
Páginas | Total 26 Páginas | |
PDF Descargar | [ Datasheet AA150XT11.PDF ] |
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