32WH37G Schematic ( Datenblatt PDF ) - TOSHIBA

Teilenummer 32WH37G
Hersteller TOSHIBA
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32WH37G Datasheet, Funktion
AK41 Chassis
datasheet pdf -

32WH37G Datasheet, Funktion
1. Gain control voltage (AGC)
2. Tuning voltage
3. I²C-bus address select
4. I²C-bus serial clock
5. I²C-bus serial data
6. Not connected
7. PLL supply voltage
8. ADC input
9. Tuner supply voltage
10. Symmetrical IF output 1
11. Symmetrical IF output 2
: 4.0V, Max:4.5V
: Max:5.5V
: Min:-0.3V, Max:5.5V
: Min:-0.3V, Max:5.5V
: 5.0V, Min:4.75V, Max:5.5V
: 33V, Min:30V, Max:35V
K9453: Two channels switchable sound IF saw filter of BG, DK, I, L systems for input channel 2 and of L´
system for input channel 1.
K3953: Two channel switchable video IF saw filter of BG, DK, I, L systems for input channel 2 and of L´
system for input channel 1.
J3950: Video IF saw filter for I system
The MSP3410D is an I2C controlled single-chip multistandard sound processor for applications in analog and digital TV
sets. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out is
performed in a single-chip covering all European TV-standards. It is designed to simultaneously perform digital
demodulation and decoding of NICAM-coded TV stereo sound, as well as demodulation of FM-mono TV sound and two
FM systems according to the German or Korean terrestrial specs. It is also possible to do AM-demodulation according to
the SECAM system. There is AGC for analog inputs: 0.14 - 3Vpp. All demodulation and filtering is performed on chip and
is individually programmable. All digital NICAM standards (B/G, L, and I) are realised. Only one crystal clock (18.432Mhz)
is necessary. External capacitors at each crystal pin to ground are required. They are necessary for tuning the open-loop
frequency of the internal PLL and for stabilising the frequency in closed-loop operation. The higher the capacitors, the
lower the clock frequency result. The nominal free running frequency should match the centre of the tolerance range
between 18.433 and 18.431Mhz as closely as possible. By means of standardised I2S interface, additional feature
processors (DPL35xx, Dolby Prologic processor for this chassis) can be connected to the IC.
I2S bus interface consists of five pins:
I2S_DA_IN1…2 for input four channels (two channels per line) per sampling cycle (32Khz).
for output, two channels per sampling cycle (32KHz).
for timing of the transmission of I2S serial data, 1.024Mhz.
for the word strobe line defining the left and right sample.
n 5-band graphic equalizer (as in MSP3400C)
n Enhanced spatial affect (pseudo stereo / base-width enlargement as in MSP3400C)
n Headphone channel with balance, bass treble, loudness
n Balance for loudspeaker and headphone channels in dB units (optional)
n Additional pair of D/A converters for SCART2 out
n Improved over-sampling filters (as in MSP 3400C)
n Additional SCART input
n Full SCART in/out matrix without restrictions
n SCART volume in dB units (optional)
n Additional I²S input (as in MSP 3400C)
n New FM-identification (as in MSP 3400C)
n Demodulator short programming
n Auto-detection for terrestrial TV-sound standards
n Precise bit-error rate indication
n Automatic switch from NICAM to FM/AM or vice versa
n Improved NICAM synchronisation algorithm
n Improved carrier mute algorithm
n Improved AM-demodulation
n ADR together with DRP 3510A
n Dolby Pro Logic together with DPL 35xx A
n Reduction of necessary controlling
n Less external components
n Significant reduction of radiation
datasheet pdf -

6 Page

32WH37G pdf, datenblatt
EPROM (M27W401)
The M27W401 is a low voltage 4Mbit EPROM (UV erasable). It is ideally suited for micro processor systems requiring
large data or program storage and is organised as 522,288 by 8 bits. The M27W401 operates in the read mode with a
supply voltage as low as 2.7V at –40 to 85°C temperature range.
n Organisation 512K x 8
n Single 3.3V power supply
n Operationally Compatible with Existing Megabit EPROMs
n Industry Standard 32-pinDual-in-line Package
n All inputs/Outputs Fully TTL Compatible
n 8-Bit Output for Use in Microprocessor-Based Systems
n Power Saving CMOS Technology
n 3-State Output Buffers
n 400 mV Minimum DC Noise Immunity with Standard TTL Loads
n Latch up immunity of 250mA on all input and output pins
n No pull-up resistors required
n Low power dissipation
VPC3215, CIP3250, SDA9400, DDP3310
The feature box consists of four I²C controlled ICs:
Video Processor
Component Interface Processor CIP3250
Digital Image Processor
Digital Deflection Processor DDP3310
The input supplies to the feature box are +12V, +5V. The ICs do also need a supply of 3.3V, which is regulated
by IC4 LM314.
Besides the composite video in normal operation and luma/chroma inputs in the SVHS applications, there are also
R-G-B-FB inputs from the PIP module.
OSD R-G-B-FB inputs from the Megatext IC or from the controller in the case of TV-text option. While the 50Hz sync
signals for PIP are supplied by the VPC3215, the 100Hz sync signals for OSD are supplied by the DDP3310.
Control signals for HV stage such as VertQ, Vert, HDrive, EW (East-West) and SVM (Scan Velocity Modulation) are
produced by this module. VProt and HProt input signals are used for protection. There are also a flyback sample
signal from HV stage and the sense signal from the CRT board.
The feature box also supports the VGA mode.
VPC32X5 (Video Processor)
Figure 1
As seen in figure 1 all the processings in VPC are digital. This IC has four composite, one SVHS input, and one
composite output which is used for teletext. In AK28 the main video input is Vin2, which is also used for luma input in
SVHS applications.
After switching the inputs the signals are converted to digital via two 8 bit ADCs. And these digital data are processed
to produce the 4:2:2 formatted digital YUV signals. The main features are, multi-standard color decoding including all
sub-standards, multi-standard sync processing, adaptive 4H comb filter, linear horizontal scaling, as well as nonlinear
horizontal scaling (panorama vision.) It provides 50Hz vertical and 15625Hz horizontal sync signals for the PIP module.
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