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PCA9622 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PCA9622
Beschreibung 16-bit Fm I2C-bus 100 mA 40 V LED driver
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 30 Seiten
PCA9622 Datasheet, Funktion
PCA9622
16-bit Fm+ I2C-bus 100 mA 40 V LED driver
Rev. 4 — 6 September 2012
Product data sheet
1. General description
The PCA9622 is an I2C-bus controlled 16-bit LED driver optimized for voltage switch
dimming and blinking 100 mA Red/Green/Blue/Amber (RGBA) LEDs. Each LED output
has its own 8-bit resolution (256 steps) fixed frequency individual PWM controller that
operates at 97 kHz with a duty cycle that is adjustable from 0 % to 99.6 % to allow the
LED to be set to a specific brightness value. An additional 8-bit resolution (256 steps)
group PWM controller has both a fixed frequency of 190 Hz and an adjustable frequency
between 24 Hz to once every 10.73 seconds with a duty cycle that is adjustable from 0 %
to 99.6 % that is used to either dim or blink all LEDs with the same value.
Each LED output can be off, on (no PWM control), set at its individual PWM controller
value or at both individual and group PWM controller values. The PCA9622 operates with
a supply voltage range of 2.3 V to 5.5 V and the 100 mA open-drain outputs allow
voltages up to 40 V.
The PCA9622 is one of the first LED controller devices in a new Fast-mode Plus (Fm+)
family. Fm+ devices offer higher frequency (up to 1 MHz) and more densely populated
bus operation (up to 4000 pF).
The active LOW Output Enable input pin (OE) blinks all the LED outputs and can be used
to externally PWM the outputs, which is useful when multiple devices need to be dimmed
or blinked together without using softwarewww.DataSheet.net/ control.
Software programmable LED Group and three Sub Call I2C-bus addresses allow all or
defined groups of PCA9622 devices to respond to a common I2C-bus address, allowing
for example, all red LEDs to be turned on or off at the same time or marquee chasing
effect, thus minimizing I2C-bus commands. Seven hardware address pins allow up to
126 devices on the same bus.
The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9622
through the I2C-bus, identical to the Power-On Reset (POR) that initializes the registers to
their default state causing the outputs to be set HIGH (LED off). This allows an easy and
quick way to reconfigure all device registers to the same condition.
The PCA9622, PCA9625 and PCA9635 software is identical and if the PCA9622 on-chip
100 mA NAND FETs do not provide enough current or voltage to drive the LEDs, then the
PCA9635 with larger current or higher voltage external drivers can be used.
Datasheet pdf - http://www.DataSheet4U.co.kr/






PCA9622 Datasheet, Funktion
NXP Semiconductors
PCA9622
16-bit Fm+ I2C-bus 100 mA 40 V LED driver
‘reserved for future use’ I2C-bus addresses (0000 011, 1111 1XX)
slave devices that use the 10-bit addressing scheme (1111 0XX)
slave devices that are designed to respond to the General Call address (0000 000)
High-speed mode (Hs-mode) master code (0000 1XX)
slave address
A6 A5 A4 A3 A2 A1 A0 R/W
hardware selectable
002aab319
Fig 3. Slave address
The last bit of the address byte defines the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
7.1.2 LED All Call I2C-bus address
Default power-up value (ALLCALLADR register): E0h or 1110 000
Programmable through I2C-bus (volatile programming)
At power-up, LED All Call I2C-bus address is enabled. PCA9622 sends an ACK when
E0h (R/W = 0) or E1h (R/W = 1) is sent by the master.
See Section 7.3.8 “ALLCALLADR, LED All Call I2C-bus address” for more detail.
www.DataSheet.net/
Remark: The default LED All Call I2C-bus address (E0h or 1110 000) must not be used as
a regular I2C-bus slave address since this address is enabled at power-up. All the
PCA9622s on the I2C-bus will acknowledge the address if sent by the I2C-bus master.
7.1.3 LED Sub Call I2C-bus addresses
3 different I2C-bus addresses can be used
Default power-up values:
SUBADR1 register: E2h or 1110 001
SUBADR2 register: E4h or 1110 010
SUBADR3 register: E8h or 1110 100
Programmable through I2C-bus (volatile programming)
At power-up, Sub Call I2C-bus addresses are disabled. PCA9622 does not send an
ACK when E2h (R/W = 0) or E3h (R/W = 1), E4h (R/W = 0) or E5h (R/W = 1), or
E8h (R/W = 0) or E9h (R/W = 1) is sent by the master.
See Section 7.3.7 “SUBADR1 to SUBADR3, I2C-bus subaddress 1 to 3” for more detail.
Remark: The default LED Sub Call I2C-bus addresses may be used as regular I2C-bus
slave addresses as long as they are disabled.
PCA9622
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 6 September 2012
© NXP B.V. 2012. All rights reserved.
6 of 39
Datasheet pdf - http://www.DataSheet4U.co.kr/

6 Page









PCA9622 pdf, datenblatt
NXP Semiconductors
PCA9622
16-bit Fm+ I2C-bus 100 mA 40 V LED driver
7.3.4 GRPPWM, group duty cycle control
Table 8. GRPPWM - Group brightness control register (address 12h) bit description
Legend: * default value
Address Register Bit Symbol Access Value
Description
12h
GRPPWM 7:0 GDC[7:0] R/W
1111 1111 GRPPWM register
When DMBLNK bit (MODE2 register) is programmed with logic 0, a 190 Hz fixed
frequency signal is superimposed with the 97 kHz individual brightness control signal.
GRPPWM is then used as a global brightness control allowing the LED outputs to be
dimmed with the same value. The value in GRPFREQ is then a ‘Don’t care’.
General brightness for the 16 outputs is controlled through 256 linear steps from 00h
(0 % duty cycle = LED output off) to FFh (99.6 % duty cycle = maximum brightness).
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3
registers).
When DMBLNK bit is programmed with logic 1, GRPPWM and GRPFREQ registers
define a global blinking pattern, where GRPFREQ contains the blinking period (from
24 Hz to 10.73 s) and GRPPWM the duty cycle (ON/OFF ratio in %).
duty cycle = G-----D-----C-------7---:--0----
256
(2)
7.3.5 GRPFREQ, group frequency
Table 9. GRPFREQ - Group Frequency register (address 13h) bit description
www.DataSheet.net/
Legend: * default value.
Address Register Bit Symbol Access Value
Description
13h
GRPFREQ 7:0 GFRQ[7:0] R/W
0000 0000* GRPFREQ register
GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2
register) is equal to 1. Value in this register is a ‘Don’t care’ when DMBLNK = 0.
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3
registers).
Blinking period is controlled through 256 linear steps from 00h (41 ms, frequency 24 Hz)
to FFh (10.73 s).
global blinking period = G-----F----R----Q-------7----:--0-------+-----1-s
24
(3)
PCA9622
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 6 September 2012
© NXP B.V. 2012. All rights reserved.
12 of 39
Datasheet pdf - http://www.DataSheet4U.co.kr/

12 Page





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