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C8051F395-A-GM Schematic ( PDF Datasheet ) - Silicon Laboratories

Teilenummer C8051F395-A-GM
Beschreibung (C8051F37X C8051F39X) 512B EEPROM Mixed-Signal MCU
Hersteller Silicon Laboratories
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Gesamt 30 Seiten
C8051F395-A-GM Datasheet, Funktion
C8051F39x/37x
50 MIPS 16 kB Flash, 512B EEPROM Mixed-Signal MCU
Analog Peripherals (‘F390/2/4/6/8 and ‘F370/4)
- 10-Bit ADC
Programmable throughput up to 500 ksps
Up to 16 external inputs, programmable as single-
ended or differential
Reference from on-chip voltage reference, VDD or
external VREF pin
Internal or external start of conversion sources
- Two 10-Bit Current Output DACs
Supports output through resets for continuous
operation
- Comparator
Programmable hysteresis and response time
Configurable as interrupt or reset source
- Precision Temperature Sensor
Accurate to ±2 °C across temperature range with no
user calibration
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-
intrusive in-system debug (no emulator required)
- Provides breakpoints, single stepping,
inspect/modify memory and registers
Low Power
- 160 µA/MHz Active mode with 49 MHz internal
precision oscillator
- 200 nA Stop mode current
Temperature Range
- –40 to +85 °C (‘F37x)
- –40 to +105 °C (‘F39x)
Package
- 24-Pin QFN (‘F390/1/4/5 and ‘F37x)
- 20-Pin QFN (‘F392/3/6/7/8/9)
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 50 MIPS throughput with 50 MHz clock
- Expanded interrupt handler
Memory
- Up to 1 kbytes internal data RAM (256 + 768)
- Up to 16 kB Flash; In-system programmable in 512-
byte Sectors
- 512 bytes of byte-programmable EEPROM; 1 mil-
lion write/erase cycles (‘F37x)
Digital Peripherals
- 21 or 17 Port I/O
- UART, 2 SMBus (I2C compatible), and SPI serial
ports
- Six general purpose 16-bit counter/timers
- 16-Bit programmable counter array (PCA) with three
capture/compare modules and PWM functionality
Clock Sources
- 49 MHz ±2% precision internal oscillator
Supports crystal-less UART operation
Low-power suspend mode with fast wake time
- 80 kHz low-frequency, low-power oscillator
- External oscillator: Crystal, RC, C, or CMOS clock
- Can switch between clock sources on-the-fly; useful
in power saving modes
Supply Voltage 1.8 to 3.6 V
www.DataSheet.net/
- Built-in voltage supply monitor
ANALOG
PERIPHERALS
A
M
U
X
10-bit
500 ksps
ADC
Cu1DrC0r-Aeu1bnDrC0irtt-AebnCitt
VREF
+
VOLTAGE
COMPARATOR
Temp Sensor
Precision
Temp Sensor
‘F390/2/4/6/8 &
‘F370/4 Only
DIGITAL I/O
UART
SMBus0
SMBus1
SPI
PCA0
PCA1
PCA2
Timer 0
Timer 1
Timer 2
Timer 3
Timer 4
Timer 5
Port 0
Port 1
P2.0
P2.1–
P2.4*
*P2.1–2.4 QFN24 Only
49 MHz PRECISION 80 KHz LOW FREQUENCY
INTERNAL OSCILLATOR INTERNAL OSCILLATOR
512 B
EEPROM
HIGH-SPEED CONTROLLER CORE
16/8 kB
8051 CPU
1024 B
ISP FLASH
(50 MIPS)
SRAM
FLEXIBLE
INTERRUPTS
DEBUG
CIRCUITRY
POR WDT
Preliminary Rev. 0.71 8/12
Copyright © 2012 by Silicon Laboratories
C8051F39x/37x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Datasheet pdf - http://www.DataSheet4U.co.kr/






C8051F395-A-GM Datasheet, Funktion
C8051F39x/37x
28.3.4. SCL Low Timeout.................................................................................. 192
28.3.5. SCL High (SMBus Free) Timeout ......................................................... 193
28.4. Using the SMBus........................................................................................... 193
28.4.1. SMBus Configuration Register.............................................................. 193
28.4.2. SMBus Pin Swap .................................................................................. 195
28.4.3. SMBus Timing Control .......................................................................... 195
28.4.4. SMBnCN Control Register .................................................................... 199
28.4.4.1. Software ACK Generation ............................................................ 199
28.4.4.2. Hardware ACK Generation ........................................................... 199
28.4.5. Hardware Slave Address Recognition .................................................. 202
28.4.6. Data Register ........................................................................................ 207
28.5. SMBus Transfer Modes................................................................................. 209
28.5.1. Write Sequence (Master) ...................................................................... 209
28.5.2. Read Sequence (Master) ...................................................................... 210
28.5.3. Write Sequence (Slave) ........................................................................ 211
28.5.4. Read Sequence (Slave) ........................................................................ 212
28.6. SMBus Status Decoding................................................................................ 212
29. UART0 ................................................................................................................... 218
29.1. Enhanced Baud Rate Generation.................................................................. 219
29.2. Operational Modes ........................................................................................ 220
29.2.1. 8-Bit UART ............................................................................................ 220
29.2.2. 9-Bit UART ............................................................................................ 221
29.3. Multiprocessor Communications ................................................................... 222
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30. Enhanced Serial Peripheral Interface (SPI0) ..................................................... 226
30.1. Signal Descriptions........................................................................................ 227
30.1.1. Master Out, Slave In (MOSI)................................................................. 227
30.1.2. Master In, Slave Out (MISO)................................................................. 227
30.1.3. Serial Clock (SCK) ................................................................................ 227
30.1.4. Slave Select (NSS) ............................................................................... 227
30.2. SPI0 Master Mode Operation ........................................................................ 228
30.3. SPI0 Slave Mode Operation .......................................................................... 229
30.4. SPI0 Interrupt Sources .................................................................................. 230
30.5. Serial Clock Phase and Polarity .................................................................... 230
30.6. SPI Special Function Registers ..................................................................... 232
31. Timers ................................................................................................................... 240
31.1. Timer 0 and Timer 1 ...................................................................................... 243
31.1.1. Mode 0: 13-bit Counter/Timer ............................................................... 243
31.1.2. Mode 1: 16-bit Counter/Timer ............................................................... 244
31.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload..................................... 245
31.1.4. Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................ 246
31.2. Timer 2 .......................................................................................................... 251
31.2.1. 16-bit Timer with Auto-Reload............................................................... 251
31.2.2. 8-bit Timers with Auto-Reload............................................................... 252
31.2.3. Low-Frequency Oscillator (LFO) Capture Mode ................................... 253
31.3. Timer 3 .......................................................................................................... 257
6 Preliminary Rev. 0.71
Datasheet pdf - http://www.DataSheet4U.co.kr/

6 Page









C8051F395-A-GM pdf, datenblatt
C8051F39x/37x
Table 29.2. Timer Settings for Standard Baud Rates
Using an External 22.1184 MHz Oscillator ......................................... 225
Table 30.1. SPI Slave Timing Parameters ............................................................ 239
Table 32.1. PCA Timebase Input Options ............................................................. 274
Table 32.2. PCA0CPM and PCA0PWM Bit Settings for PCA
Capture/Compare Modules ................................................................ 276
Table 32.3. Watchdog Timer Timeout Intervals1 ................................................... 285
www.DataSheet.net/
12 Preliminary Rev. 0.71
Datasheet pdf - http://www.DataSheet4U.co.kr/

12 Page





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