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Teilenummer | D78F0078 |
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Beschreibung | UPD78F0078 | |
Hersteller | NEC | |
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Gesamt 30 Seiten User’s Manual
µPD780078, 780078Y Subseries
8-Bit Single-Chip Microcontrollers
µPD780076
µPD780078
µPD78F0078
µPD780076Y
µPD780078Y
µPD78F0078Y
www.DataSheet.net/
Document No. U14260EJ3V1UD00 (3rd edition)
Date Published August 2004 N CP(K)
Printed in Japan
2000, 2003
Datasheet pdf - http://www.DataSheet4U.co.kr/
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC
Electronics product in your application, pIease contact the NEC Electronics office in your country to
obtain a list of authorized representatives and distributors. They will verify:
• Device availability
• Ordering information
• Product release schedule
• Availability of related technical literature
• Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
• Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.
[GLOBAL SUPPORT]
http://www.necel.com/en/support/support.html
NEC Electronics America, Inc. (U.S.)
Santa Clara, California
Tel: 408-588-6000
800-366-9782
NEC Electronics (Europe) GmbH
Duesseldorf, Germanywww.DataSheet.net/
Tel: 0211-65030
• Sucursal en España
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• Tyskland Filial
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Hong Kong
Tel: 2886-9318
NEC Electronics Hong Kong Ltd.
Seoul Branch
Seoul, Korea
Tel: 02-558-3737
NEC Electronics Shanghai Ltd.
Shanghai, P.R. China
Tel: 021-5888-5400
NEC Electronics Taiwan Ltd.
Taipei, Taiwan
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NEC Electronics Singapore Pte. Ltd.
Novena Square, Singapore
Tel: 6253-8311
• United Kingdom Branch
Milton Keynes, UK
Tel: 01908-691-133
J04.1
6 User’s Manual U14260EJ3V1UD
Datasheet pdf - http://www.DataSheet4U.co.kr/
6 Page 3.2.18 IC (mask ROM version only) ..................................................................................................... 47
3.3 Pin I/O Circuits and Recommended Connection of Unused Pins ................................... 48
CHAPTER 4 PIN FUNCTIONS (µPD780078Y SUBSERIES) ......................................................... 52
4.1 Pin Function List .................................................................................................................. 52
4.2 Description of Pin Functions .............................................................................................. 55
4.2.1 P00 to P03 (Port 0) ................................................................................................................... 55
4.2.2 P10 to P17 (Port 1) ................................................................................................................... 55
4.2.3 P20 to P25 (Port 2) ................................................................................................................... 55
4.2.4 P30 to P36 (Port 3) ................................................................................................................... 56
4.2.5 P40 to P47 (Port 4) ................................................................................................................... 57
4.2.6 P50 to P57 (Port 5) ................................................................................................................... 57
4.2.7 P64 to P67 (Port 6) ................................................................................................................... 57
4.2.8 P70 to P75 (Port 7) ................................................................................................................... 58
4.2.9 P80 (Port 8) ............................................................................................................................... 59
4.2.10 AVREF ......................................................................................................................................... 59
4.2.11 AVSS .......................................................................................................................................... 59
4.2.12 RESET ...................................................................................................................................... 59
4.2.13 X1 and X2 ................................................................................................................................. 59
4.2.14 XT1 and XT2 ............................................................................................................................. 59
4.2.15 VDD0 and VDD1 ............................................................................................................................ 59
4.2.16 VSS0 and VSS1 ............................................................................................................................ 59
4.2.17 VPP (flash memory versions only) ............................................................................................. 59
4.2.18 IC (mask ROM version only) ..................................................................................................... 60
4.3 Pin I/O Circuits and Recommended Connectionwww.DataSheet.net/ of Unused Pins ................................... 61
CHAPTER 5 CPU ARCHITECTURE ................................................................................................ 64
5.1 Memory Spaces .................................................................................................................... 64
5.1.1 Internal program memory space ............................................................................................... 67
5.1.2 Internal data memory space ..................................................................................................... 68
5.1.3 Special function register (SFR) area ......................................................................................... 68
5.1.4 External memory space ............................................................................................................ 68
5.1.5 Data memory addressing .......................................................................................................... 69
5.2 Processor Registers ............................................................................................................ 72
5.2.1 Control registers ........................................................................................................................ 72
5.2.2 General-purpose registers ........................................................................................................ 75
5.2.3 Special function registers (SFR) ............................................................................................... 77
5.3 Instruction Address Addressing ........................................................................................ 81
5.3.1 Relative addressing ................................................................................................................... 81
5.3.2 Immediate addressing ............................................................................................................... 82
5.3.3 Table indirect addressing .......................................................................................................... 83
5.3.4 Register addressing .................................................................................................................. 84
5.4 Operand Address Addressing ............................................................................................ 85
5.4.1 Implied addressing .................................................................................................................... 85
5.4.2 Register addressing .................................................................................................................. 86
5.4.3 Direct addressing ...................................................................................................................... 87
12 User’s Manual U14260EJ3V1UD
Datasheet pdf - http://www.DataSheet4U.co.kr/
12 Page | ||
Seiten | Gesamt 30 Seiten | |
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