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PDF P645HW01-V0 Data sheet ( Hoja de datos )
| Número de pieza | P645HW01-V0 | |
| Descripción | LCD MODULE | |
| Fabricantes | AUO | |
| Logotipo |  |
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Gleichmann & Co. Electronics GmbH
Product Marketing Displays & Systems
Schraderstr. 44, D- 67227 Frankenthal
Tel : +49 7249-910-0, Fax: +49 7249-910-559
[email protected] http://www.msc-ge.com
Model Name: P645HW01 V0
Product Specification
Rev.1.1
Date: 2009/01/16
Product Functional Specification
65" Full HD Color TFT-LCD Module
Model Name: P645HW01 V0
() Preliminary Specification
(*) Final Specification
www.DataSheet4U.net
Note: This specification is subject to change without notice.
©Copyright AU Optronics Corp.
2008 All Rights Reserved
No Reproduction and Redistribution Allowed
P645HW01 V0
Page 2/32
1 page  
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Model Name: P645HW01 V0
Product Specification
2. Absolute Maximum Ratings
The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit:
Item
Logic/LCD Drive Voltage
Input Voltage of Signal
BLU Input Voltage
BLU Brightness Control Voltage
Operating Temperature
Operating Humidity
Storage Temperature
Storage Humidity
Panel Surface Temperature
Open lamp Feedback Voltage
Symbol
VCC
VIN
VDDB
VBLON
TOP
HOP
TST
HST
TSUR
VFB
Min.
-0.3
-0.3
-0.3
-0.3
0
10
-20
10
--
-0.3
Max
+14.0
+4.0
+27.0
+7.0
+50
90
+60
90
+65
+3.6
Unit
V
V
V
V
°C
%RH
°C
%RH
°C
V
Note
[1]
[1]
[1]
[1]
[2]
[2]
[2]
[2]
[2]
Note [1]: If operate over spec but under absolute maximum rating, duration must be < 50ms.
Note [2]: Maximum Wet-Bulb should be 39°C and no co ndensation. The relative humidity must not
exceed 80% non-condensing at temperatures of 40°C o r less. At temperatures greater than
40°C, the wet bulb temperature must not exceed 39°C . When operate at low temperatures,
the brightness of CCFL will drop and the life time of CCFL will be reduced.
©Copyright AU Optronics Corp.
2008 All Rights Reserved
No Reproduction and Redistribution Allowed
P645HW01 V0
Page 6/32
5 Page 
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Model Name: P645HW01 V0
Product Specification
3.3 Signal Timing Specification
This is the signal timing required at the input of the user connector. All of the interface signal timing should be
satisfied with the following specifications for its proper operation.
Timing Table (DE only Mode)
Signal
Vertical Section
Horizontal Section
Clock
Vertical Frequency
Horizontal Frequency
Item
Period
Active
Blanking
Period
Active
Blanking
Period
Frequency
Frequency
Frequency
Symbol
TV
Tdisp (v)
Tblk (v)
Th
Tdisp (h)
Tblk (h)
TCLK
FCLK
FV
FH
Min.
1120
40
1050
90
18.09
55.27
47
52.64
Typ.
1130
1080
50
1100
960
140
13.41
74.58
60
67.8
Max
1135
55
1110
150
12.61
79.37
63
71.51
Unit
TH
TH
TCLK
TCLK
ns
MHz
Hz
KHz
Note [1]: Display position is specific by the rise of DE signal only.
Horizontal display position is specified by the falling edge of 1st DCLK right after the rise of
DE, is displayed on the left edge of the screen.
Vertical display position is specified by the rise of DE after a “Low” level period equivalent to
eight times of horizontal period. The 1st data corresponding to one horizontal line after the
rise of ENAB is displayed at the top line of screen.
Note [2]: If a period of DE “High” is less than 1920 DCLK or less than 1080 lines, the rest of the
screen displays black.
Note [3]: The display position does not fit to the screen if a period of DE “High” and the effective data
period do not synchronize with each other.
©Copyright AU Optronics Corp.
2008 All Rights Reserved
No Reproduction and Redistribution Allowed
P645HW01 V0
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