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Teilenummer | A035QN02_V9 |
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Beschreibung | Color TFT LCD Module | |
Hersteller | AUO | |
Logo | ||
Gesamt 36 Seiten CUSTOMER APPROVAL SHEET
CUSTOMER
MODEL
CUSTOMER
APPROVED
□ APPROVAL FOR SPECIFICATIONS ONLY (Spec. Ver. 0.7 )
□ APPROVAL FOR SPECIFICATIONS AND ES SAMPLE (Spec. Ver.0.7 )
□ APPROVAL FOR SPECIFICATIONS AND CS SAMPLE (Spec. Ver.0.7 )
www.DataSheet.co.kr
P/N : 97.03A11.900-S06
Comment :
ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED, OR
TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.
Datasheet pdf - http://www.DataSheet4U.net/
C. Physical Specifications
NO. Item
Unit
1 Display Resolution dot
2 Active Area mm
3 Screen Size inch
4 Dot Pitch mm
5 Color Configuration
--
6 Color Depth
--
7 Overall Dimension mm
8 Weight
g
9 Display Mode
--
10 Gray Level Inversion Direction
Note 1: Below figure shows dot stripe arrangement.
Version
Page:
0.7
6/36
Specification
320 RGB (H)×240(V)
70.08(H)×52.56(V)
3.5(Diagonal)
0.073(H)×0.219(V)
R. G. B. Stripe
16.7M Colors
76.9(H) × 63.9(V) × 4.07(T)
40
Normally White
6 O’clock
Remark
Note 1
Note 2
www.DataSheet.co.kr
Note 2: Not including FPC. Refer to the drawing next page for further information.
ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED, OR
TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.
Datasheet pdf - http://www.DataSheet4U.net/
6 Page 4. AC Timing
a. Display General Information
Version
Page:
0.7
12/36
Reset Pulse Width:
Characteristics
Symbol
Target
Min
Target
Typ
DOTCLK Frequency
8 bits serial without Dummy
8 bits serial with Dummy
fDOTCLK
www.DataSheet.co.kr
- 15
- 20
DOTCLK Period
8 bits serial without Dummy
8 bits serial with Dummy
tDOTCLK
42 67
31 50
Vertical Sync. Setup Time
Vertical Sync. Hold Time
Horizontal Sync. Setup Time
tvsys
tvsyh
thsys
5-
5-
5-
Horizontal Sync. Hold Time
thsyh
5-
Phase Difference of Sync. 8 bits serial without Dummy thv
0-
Signal Falling Edge
8 bits serial with Dummy
thv
0
DOTCLK Low Period
tCKL 16 -
DOTCLK High Period
tCKH 16 -
Data Setup Time
tds 10 -
Data Hold Time
tdh 10 -
Reset Pulse Width
tRES 2.5 -
Rise/Fall Time
tr/tf 5 -
Note: HSYNC’s falling and CLK’s rising cannot be conflicted.
Note: Amplitude of input single is assumed to be equal to VDDIO (Input digital voltage).
Target
Max
Units
24
MHz
32
-
nSec
-
- nSec
- nSec
- nSec
- nSec
960
1280
tDOTCLK
tDOTCLK
- nSec
- nSec
- nSec
- nSec
- uSec
25 nSec
ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED, OR
TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.
Datasheet pdf - http://www.DataSheet4U.net/
12 Page | ||
Seiten | Gesamt 36 Seiten | |
PDF Download | [ A035QN02_V9 Schematic.PDF ] |
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