AD9648 Datasheet PDF - Analog Devices
| Part Number | AD9648 | |
| Description | 1.8 V Dual Analog-to-Digital Converter | |
| Manufacturers | Analog Devices | |
| Logo |  |
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Data Sheet
14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual
Analog-to-Digital Converter
AD9648
FEATURES
1.8 V analog supply operation
1.8 V CMOS or LVDS outputs
SNR = 74.5 dBFS @ 70 MHz
SFDR = 91 dBc @ 70 MHz
Low power: 106 mW/channel @ 125 MSPS
Differential analog input with 650 MHz bandwidth
IF sampling frequencies to 200 MHz
On-chip voltage reference and sample-and-hold circuit
2 V p-p differential analog input
DNL = ±0.5 LSB
Serial port control options
Offset binary, gray code, or twos complement data format
Optional clock duty cycle stabilizer
Integer 1-to-8 input clock divider
Data output multiplex option
Built-in selectable digital test pattern generation
Energy-saving power-down modes
Data clock out with programmable clock and data
alignment
APPLICATIONS
Communications
Diversity radio systems
Multimode digital receivers
GSM, EDGE, W-CDMA, LTE,
CDMA2000, WiMAX, TD-SCDMA
I/Q demodulation systems
Smart antenna systems
Broadband data applications
Battery-powered instruments
Hand held scope meters
Portable medical imaging
Ultrasound
Radar/LIDAR
FUNCTIONAL BLOCK DIAGRAM
AVDD
AGND
SDIO SCLK CSB
VIN+A
VIN–A
VREF
SENSE
VCM
RBIAS
VIN–B
VIN+B
REF
SELECT
SPI
ADC
PROGRAMMING DATA
AD9648
ADC
DIVIDE DUTY CYCLE
1 TO 8 STABILIZER
MODE
CONTROLS
ORA
D13A
D0A
DCOA
DRVDD
ORB
D13B
D0B
DCOB
CLK+ CLK–
SYNC
DCS
PDWN DFS OEB
NOTES
1. PIN NAMES ARE FOR THE CMOS PIN CONFIGURATION ONLY;
SEE FIGURE 7 FOR LVDS PIN NAMES.
Figure 1.
PRODUCT HIGHLIGHTS
1. The AD9648 operates from a single 1.8 V analog power
supply and features a separate digital output driver supply
to accommodate 1.8 V CMOS or LVDS logic families.
2. The patented sample-and-hold circuit maintains excellent
performance for input frequencies up to 200 MHz and is
designed for low cost, low power, and ease of use.
3. A standard serial port interface supports various product
features and functions, such as data output formatting,
internal clock divider, power-down, DCO/data timing and
offset adjustments.
4. The AD9648 is packaged in a 64-lead RoHS compliant
LFCSP that is pin compatible with the AD9650/AD9269/
AD9268 16-bit ADC, the AD9258 14-bit ADC, the
AD9628/AD9231 12-bit ADCs, and the AD9608/AD9204
10-bit ADCs, enabling a simple migration path between
10-bit and 16-bit converters sampling from 20 MSPS to
125 MSPS.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
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AD9648
Data Sheet
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, DCS enabled, unless
otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Gain Error
Differential Nonlinearity (DNL)1
Integral Nonlinearity (INL)1
MATCHING CHARACTERISTIC
Offset Error
Gain Error
TEMPERATURE DRIFT
Offset Error
Gain Error
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Load Regulation Error at 1.0 mA
INPUT REFERRED NOISE
VREF = 1.0 V
ANALOG INPUT
Input Span, VREF = 1.0 V
Input Capacitance2
Input Resistance (Differential)
Input Common-Mode Voltage
Input Common-Mode Range
POWER SUPPLIES
Supply Voltage
AVDD
DRVDD
Supply Current
IAVDD1
IDRVDD (1.8 V CMOS)1
IDRVDD(1.8 V LVDS)1
Temp Min
Full 14
AD9648-105
Typ Max
Min
14
Full Guaranteed
Full −0.8 −0.3
+0.2 −0.8
Full −4.20 ±1.3
+4.2 −5.1
Full −0.5
+1.2 −0.5
25°C ±0.5
Full −2.3
+2.3 −2.3
25°C ±1.0
Full
±0.01
±0.58
Full ±0.5 ±4.0
Full ±2
Full ±50
Full 0.98 1.00
Full 2
1.02 0.98
25°C 0.98
Full
Full
Full
Full
Full 0.5
2
5
7.5
0.9
1.3 0.5
AD9648-125
Typ Max
Guaranteed
−0.3
±1.3
±0.5
±1.0
+0.2
+5.1
+1.2
+2.3
±0.01
±0.5
±0.58
±4.0
±2
±50
1.00 1.02
2
0.98
2
5
7.5
0.9
1.3
Unit
Bits
% FSR
% FSR
LSB
LSB
LSB
LSB
% FSR
% FSR
ppm/°C
ppm/°C
V
mV
LSB rms
V p-p
pF
kΩ
V
V
Full 1.7
Full 1.7
Full
Full
Full
1.8
1.8
81
19.2
63.5
1.9 1.7
1.9 1.7
86
1.8
1.8
95
22.5
65.0
1.9 V
1.9 V
100 mA
mA
mA
Rev. C | Page 4 of 41
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| Information | Total 30 Pages | |
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| Download | [ AD9648.PDF Datasheet ] | |
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