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PDF A4970 Data sheet ( Hoja de datos )
| Número de pieza | A4970 | |
| Descripción | Dual Full-Bridge PWM Motor Driver | |
| Fabricantes | Allegro MicroSystems | |
| Logotipo |  |
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A4970
Dual Full-Bridge PWM Motor Driver
Features and Benefits
▪ 750 mA continuous output current
▪ 45 V output sustaining voltage
▪ Internal clamp diodes
▪ Internal PWM current control
▪ Low output saturation voltage
▪ Internal thermal shutdown circuitry
▪ Pin compatible with UDx2916
▪ DMOS outputs
Package: 24-pin batwing wide SOIC
(package LB)
Not to scale
Description
TheA4970 motor driver drives both windings of a bipolar stepper
motor or bidirectionally controls two DC motors. Both bridges
are capable of sustaining 45 V and include internal pulse-width
modulation (PWM) control of the output current to 750 mA.
For PWM current control, the maximum output current is
determined by user selection of a reference voltage and sensing
resistor. Two logic-level inputs select output current limits of
0%, 33%, 67%, or 100% of the maximum level.APHASE input
to each bridge determines load current direction.
Intrinsic diodes in the MOSFET output structure protect
against inductive transients. Internally generated delays prevent
crossover currents when switching current direction. Special
power-up sequencing is not required. Thermal protection
circuitry disables the outputs if the chip temperature exceeds
safe operating limits.
The device is supplied in a 24-pin surface-mount wide SOIC with
two pairs of batwing leads (LB). The webbed-pin construction
provides for maximum package power dissipation in the smallest
possible construction. The package is lead (Pb) free, with 100%
matte tin leadframe plating.
www.DataSheet.co.kr
PWM Current-Control Circuitry
Channel 1
pin numbers
shown.
VREF 10
I0 13
I1 12
Divide by
1, 1.5, or 3
VBB 24
M
17 14
OUTA
OUTB
16 E
w10 SENSE –
15 +
RC
RS CC
ONE
SHOT
9 RC
SOURCE
DISABLE
RT CT
A4970CDS, Rev. 1
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
A4970
Dual Full-Bridge Motor Driver
APPLICATIONS INFORMATION
PWM CURRENT CONTROL
The A4970 dual bridges drive both windings of a bipolar stepper
motor. Output current is sensed and controlled independently
in each bridge by an external sense resistor, RS , internal
comparator, and monostable multivibrator.
When the bridge is turned on, current increases in the motor
winding and it is sensed by the external sense resistor until the
sense voltage, VSENSE , reaches the level set at the comparator
input:
ITRIP = VREF/10 RS
The comparator then triggers the monostable, which turns off
the source driver of the bridge.
The actual load current peak will be slightly higher than the
trip point (especially for low-inductance loads) because of the
internal logic and switching delays. This delay, td , is typically 2
μs. After turn-off, the motor current decays, circulating through
the ground-clamp diode and sink transistor. The source driver
off-time (and therefore the magnitude of the current decrease)
is determined by the external RC timing components of the
monostable:
where:
toff = RTCT
RT = 20 to 100 kΩ, and
CT = 100 to 1000 pF.
The fixed off-time should be short enough to keep the current
chopping above the audible range (< 46 μs) and long enough to
properly regulate the current. Because only slow-decay current
control is available, short off times (< 10 μs) require additional
efforts to ensure proper current regulation. Factors that can
negatively affect the ability to properly regulate the current when
using short off times include: higher motor-supply voltage, light
load, and longer than necessary blank time.
When the source driver is re-enabled, the winding current (the
sense voltage) is again allowed to rise to the comparator’s
threshold. This cycle repeats itself, maintaining the average
motor winding current at the desired level.
Loads with high distributed capacitances may result in high turn-
on current peaks. This peak (appearing across RS) will attempt
to trip the comparator, resulting in erroneous current control or
high-frequency oscillations. An external RCCC time delay should
be used to further delay the action of the comparator.
The time constant for the delay to produce suitable blank time can
be estimated using:
RCCC = 0.0114 × RTCT
This equation assumes that the current control loop duty cycle
is greater than 5% and the voltage on the SENSE pin will reach
99% of the target value set for VSENSE. These assumptions will
apply to the majority of applications and can be regarded as a
starting value for further optimization by calculation or waveform
measurement.
Depending on load type, many applications will not require these
external components (SENSE connected to E).
PWM OUTPUT CURRENT WAVE FORM
V PHAS E
+
I OUT
0
–
www.DataSheet.co.kr
ITR IP
td toff
Dwg. WM-003-1A
LOAD CURRENT PATHS
VBB
RS
Bridge On
Source Off, Slow Decay
All Off, Fast Decay
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
Datasheet pdf - http://www.DataSheet4U.net/
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet A4970.PDF ] | |
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