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PDF PM600CLA060 Data sheet ( Hoja de datos )

Número de pieza PM600CLA060
Descripción INTELLIGENT POWER MODULES FLAT-BASE TYPE INSULATED PACKAGE
Fabricantes Mitsubishi　
Logotipo Mitsubishi Logotipo



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PM600CLA060
MITSUBISHI <INTELLIGENT POWER MODULES>
PM600CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
FEATURE
a) Adopting new 5th generation IGBT (CSTBT) chip, which
performance is improved by 1µm fine rule process.
For example, typical Vce(sat)=1.8V @Tj=125°C
b) I adopt the over-temperature conservation by Tj detection of
CSTBT chip, and error output is possible from all each con-
servation upper and lower arm of IPM.
• 3φ 600A, 600V Current-sense IGBT type inverter
• Monolithic gate drive & protection logic
• Detection, protection & status indication circuits for, short-
circuit, over-temperature & under-voltage (Fo available from
all arm devices)
• Acoustic noise-less 45kW/55kW class inverter application
• UL Recognized Yellow Card No.E80276(N)
File No.E80271
APPLICATION
General purpose inverter, servo drives and other motor controls
PACKAGE OUTLINES
172
11
162
6 50±0.5
50±0.5
50±0.5
12-M6 NUTS
14 22 28 22 28 22
Dimensions in mm
2 (24)
17 +1.0
–0.5
6
9.08 50
31.84
3.22 3-2.54
3.22
50
31.84
3-2.54
3.22
31.84
3-2.54
3.75
8-φ5.5
MOUNTING HOLES
13 16 17 20
14 15 18 19
21 3-2.54
53.75
21 24 25
22 23 26
21
50
28
27
3-2.54
29 3233 36
30 31 34 35
21 3-2.54
53.75
12
34
56
12 12
17 17
12 12
17 17
12 12
17 17
6-φ2.5
24- 0.64
12
(SCREWING DEPTH)
Terminal code
1. N
2. P
3. N
4. P
5. N
6. P
7. W
8. W
9. V
10. V
11. U
12. U
13. VUPC
14. UPFO
15. UP
16. VUP1
17. VUNC
18. UNFO
19. UN
20. VUN1
21. VVPC
22. VPFO
23. VP
24. VVP1
25. VVNC
26. VNFO
27. VN
28. VVN1
29. VWPC
30. WPFO
31. WP
32. VWP1
33. VWNC
34. WNFO
35. WN
36. VWN1
Jul. 2005
Datasheet pdf - http://www.DataSheet4U.net/

1 page




PM600CLA060 pdf
www.DataSheet.co.kr
MITSUBISHI <INTELLIGENT POWER MODULES>
PM600CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corre-
sponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not be al-
lowed to rise above VCES rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
VCIN
(0V)
IN
Fo
V Ic
VCIN
(15V)
IN
Fo
V –Ic
VD (all)
Fig. 1 VCE(sat) Test
a) Lower Arm Switching
VCIN
(15V)
Signal input
(Upper Arm)
Fo
Signal input Fo
VCIN (Lower Arm)
CS Vcc
VD (all)
Fig. 2 VEC Test
trr
Irr
90%
Ic
VCE
90%
b) Upper Arm Switching VD (all)
Fo
VCIN
Signal input
(Upper Arm)
VCIN
(15V)
Signal input
(Lower Arm)
Fo
Ic
10%
10%
10%
tc(on)
tc(off)
VCIN
CS Vcc td(on)
tr
td(off)
10%
tf
(ton= td(on) + tr)
(toff= td(off) + tf)
VD (all)
Ic
Fig. 3 Switching time and SC test circuit
Fig. 4 Switching time test waveform
VCIN
(15V)
P, (U,V,W)
A
IN
Fo Pulse VCE
U,V,W, (N)
VD (all)
Fig. 5 ICES Test
VCIN
Ic
Short Circuit Current
Constant Current
SC
Fo
toff(SC)
Fig. 6 SC test waveform
IPM’ input signal VCIN
(Upper Arm)
0V
IPM’ input signal VCIN
(Lower Arm)
0V
1.5V
2V
tdead
2V
1.5V
tdead
1.5V
2V
tdead
t
t
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value
Fig. 7 Dead time measurement point example
Jul. 2005
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