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G104X1-L04 Schematic ( PDF Datasheet ) - Chi Mei

Teilenummer G104X1-L04
Beschreibung TFT LCD Module
Hersteller Chi Mei
Logo Chi Mei Logo 




Gesamt 26 Seiten
G104X1-L04 Datasheet, Funktion
www.DataSheet.co.kr
Issued Date: Jan. 04, 2010
Model No.: G104X1-L04
Approval
TFT LCD Approval Specification
MODEL NO.: G104X1 - L04
Customer:
Approved by:
Note:
2010-01-19
19:09:04
APPL
yhchang
Director Accept
1/26
Version 2.0
Datasheet pdf - http://www.DataSheet4U.net/






G104X1-L04 Datasheet, Funktion
www.DataSheet.co.kr
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item
Symbol
Value
Min. Max.
Power Supply Voltage
VCC
-0.3
7
Unit
V
Issued Date: Jan. 04, 2010
Model No.: G104X1-L04
Approval
Note
(1)
2.2.2 LED CONVERTER
Item
Converter Voltage
Enable Voltage
Backlight Adjust
Symbol
Vi
EN
ADJ
Value
Min. Max.
-0.3 18
--- 5.5
--- 3.3
Unit
V
V
V
Note
(1), (2)
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) Specified values are for LED light bar (Refer to 3.2 for further information).
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
Parameter
Power Supply Voltage
Rush Current
Power Supply Current
White
Black
Power Consumption
LVDS differential input voltage
LVDS common input voltage
Symbol
VCC
IRUSH
-
PL
|VID|
VICM
Min.
3.0
-
530
380
---
100
0.7
Value
Typ.
3.3
-
570
420
1.9
-
-
Note (1) The assembly should be always operated within above ranges.
Note (2) Measurement Conditions:
+3.3V
Q1 2SK1475
FUSE
R1
47K
Max.
3.6
4.0
620
460
---
600
1.6
Ta = 25 ± 2 ºC
Unit Note
V (1)
A (2)
mA
mA
(3)
W
mV -
V-
Vcc
C3
(LCD Module Input)
1uF
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
Q2
R2
2SK1470
1K
47K
VR1
C2
0.01uF
6/26
Version 2.0
Datasheet pdf - http://www.DataSheet4U.net/

6 Page









G104X1-L04 pdf, datenblatt
www.DataSheet.co.kr
Issued Date: Jan. 04, 2010
Model No.: G104X1-L04
Approval
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal
DCLK
Item
Frequency
Total
Symbol Min. Typ. Max. Unit
Fc 55 65 75 MHZ
Tv 770 806 950 Th
Vertical Active Display Term
Display
Tvd 768 768 768 Th
Blank
Tvb 2 38 182 Th
Total
Th 1104 1344 1800 Tc
Horizontal Active Display Term Display
Thd 1024 1024 1024 Tc
Blank
Thb 76 320 776 Tc
Note
Tv=Tvd+Tvb
-
-
Th=Thd+Thb
-
-
Note (1) Since this assembly is operated in DE only mode, Hsync and Vsync input signals should be set to
low logic level. Otherwise, this assembly would operate abnormally.
(2) Frame rate is 60Hz
INPUT SIGNAL TIMING DIAGRAM
DE
Th
Tvd
Tv
Tvb
DCLK
DE
DATA
Tc
Thb
Thd
Valid display data
12/26
Version 2.0
Datasheet pdf - http://www.DataSheet4U.net/

12 Page





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