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PDF AD5111 Data sheet ( Hoja de datos )

Número de pieza AD5111
Descripción (AD5111 - AD5115) Nonvolatile Digital Potentiometer
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
Single-Channel, 128-/64-/32-Position, Up/Down, ±8%
Resistor Tolerance, Nonvolatile Digital Potentiometer
AD5111/AD5113/AD5115
FEATURES
Single-channel, 128-/64-/32-position resolution
5 kΩ, 10 kΩ, 80 kΩ nominal resistance
Maximum ±8% nominal resistor tolerance error
Low wiper resistance
±6 mA maximum wiper current density
Rheostat mode temperature coefficient: 35 ppm/°C
Potentiometer mode temperature coefficient: 5 ppm/°C
2.3 V to 5.5 V single-supply operation
Power-on EEPROM refresh time < 50 μs
Simple up/down manual or digital configurable control
Chip select enable multiple device operation
50-year typical data retention at 125°C
1 million write cycles
Wide operating temperature: −40°C to +125°C
Thin, 2 mm × 2 mm × 0.55 mm 8-lead LFCSP package
APPLICATIONS
Mechanical potentiometer replacement
Portable electronics level adjustment
Audio volume control
Low resolution DAC
LCD panel brightness and contrast control
Programmable voltage to current conversion
Programmable filters, delays, time constants
Feedback resistor programmable power supply
Sensor calibration
FUNCTIONAL BLOCK DIAGRAM
VDD
POWER-ON
RESET
AD5111/
AD5113/
AD5115
CLK
CS
U/D
EN
UP/DOWN
CONTROL
LOGIC
DATA
EEPROM
DATA
RDAC
REGISTER
A
W
B
GND
Figure 1.
GENERAL DESCRIPTION
The AD5111/AD5113/AD5115 provide a nonvolatile solution
for 128-/64-/32-position adjustment applications, offering
guaranteed low resistor tolerance errors of ±8% and up to
±6 mA current density in the A, B, and W pins. The low resistor
tolerance, low nominal temperature coefficient, and high
bandwidth simplify open-loop applications, as well as tolerance
matching applications.
The new low wiper resistance feature minimizes the wiper
resistance in the extremes of the resistor array to only 45 Ω,
typical.
A simple 3-wire up/down interface allows manual switching
or high speed digital control with clock rates up to 50 MHz.
The AD5111/AD5113/AD5115 are available in a 2 mm × 2 mm
LFCSP package. The parts are guaranteed to operate over the
extended industrial temperature range of −40°C to +125°C.
Table 1. ±8% Resistance Tolerance Family
Model Resistance (kΩ) Position
AD5110 10, 80
128
AD5111 10, 80
128
AD5112 5, 10, 80
64
AD5113 5, 10, 80
64
AD5116 5, 10, 80
64
AD5114 10, 80
32
AD5115 10, 80
32
Interface
I2C
Up/down
I2C
Up/down
Push-button
I2C
Up/down
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
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AD5111 pdf
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Data Sheet
AD5111/AD5113/AD5115
ELECTRICAL CHARACTERISTICS—AD5113
5 kΩ, 10 kΩ, and 80 kΩ versions: VDD = 2.3 V to 5.5 V, VA = VDD, VB = 0 V, −40°C < TA < +125°C, unless otherwise noted.
Table 3.
Parameter
DC CHARACTERISTICS—RHEOSTAT MODE
Resolution
Resistor Integral Nonlinearity2
Symbol
N
R-INL
Resistor Differential Nonlinearity2
Nominal Resistor Tolerance
Resistance Temperature Coefficient3
Wiper Resistance
DC CHARACTERISTICS—POTENTIOMETER
DIVIDER MODE
Integral Nonlinearity4
Differential Nonlinearity4
Full-Scale Error
R-DNL
ΔRAB/RAB
(ΔRAB/RAB)/ΔT × 106
RW
RBS
RTS
INL
DNL
VWFSE
Zero-Scale Error
VWZSE
Voltage Divider Temperature Coefficient3
RESISTOR TERMINALS
Maximum Continuous IA, IB, and IW
Current3
Terminal Voltage Range5
Capacitance A, Capacitance B3, 6
(ΔVW/VW)/ΔT × 106
CA, CB
Capacitance W3, 6
CW
Common-Mode Leakage Current3
DIGITAL INPUTS
Input Logic3
High
Low
Input Current3
Input Capacitance3
POWER SUPPLIES
Single-Supply Power Range
Positive Supply Current
EEMEM Store Current3, 7
EEMEM Read Current3, 8
Power Dissipation9
Power Supply Rejection3
VINH
VINL
IN
CIN
IDD
IDD_NVM_STORE
IDD_NVM_READ
PDISS
PSR
Test Conditions/Comments
RAB = 5 kΩ, VDD = 2.3 V to 2.7 V
RAB = 5 kΩ, VDD = 2.7 V to 5.5 V
RAB = 10 kΩ
RAB = 80 kΩ
Code = zero scale
Code = bottom scale
Code = top scale
RAB = 5 kΩ
RAB =10 kΩ
RAB = 80 kΩ
RAB = 5 kΩ
RAB =10 kΩ
RAB = 80 kΩ
Code = half scale
RAB = 5 kΩ, 10 kΩ
RAB = 80 kΩ
f = 1 MHz, measured to GND,
code = half scale
f = 1 MHz, measured to GND,
code = half scale
VA = VW = VB
VIH = VDD or VIL = GND, VDD = 5 V
VIH = VDD or VIL = GND
∆VDD/∆VSS = 5 V ± 10%
RAB = 5 kΩ
RAB =10 kΩ
RAB = 80 kΩ
Min
6
−2.5
−1
−1
−0.25
−1
−8
−0.5
−0.5
−2.5
−1.5
−1
−6
−1.5
GND
−500
2
2.3
Typ1 Max
±0.5
±0.25
±0.25
±0.1
±0.25
35
70
45
70
+2.5
+1
+1
+0.25
+1
+8
140
80
140
±0.15 +0.5
±0.15 +0.5
1.5
1
0.25
±10
+6
+1.5
VDD
20
35
±15 +500
0.8
±1
5
5.5
750
2
320
5
−43
−50
−64
Unit
Bits
LSB
LSB
LSB
LSB
LSB
%
ppm/°C
Ω
Ω
Ω
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
ppm/°C
mA
mA
V
pF
pF
nA
V
V
μA
pF
V
nA
mA
μA
μW
dB
dB
dB
Rev. 0 | Page 5 of 24
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AD5111 arduino
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Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD5111/AD5113/AD5115
VDD 1
A2
W3
B4
AD5111/
AD5113/
AD5115
TOP VIEW
(Not to Scale)
8 CS
7 U/D
6 CLK
5 GND
NOTES
1. THE EXPOSED PAD IS INTERNALLY
FLOATING.
Figure 5. Pin Configuration
Table 8. Pin Function Descriptions
Pin No. Mnemonic Description
1 VDD
2A
3W
4B
5 GND
Positive Power Supply. Decouple this pin with 0.1 µF ceramic capacitors and 10 µF capacitors.
Terminal A of RDAC. GND ≤ VA ≤ VDD.
Wiper Terminal of RDAC. GND ≤ VW ≤ VDD.
Terminal B of RDAC. GND ≤ VB ≤ VDD.
Ground Pin, Logic Ground Reference.
6 CLK
Clock Input. Each clock pulse executes the step-up or step-down of the resistance. The direction is determined
by the state of the U/D pin. CLK is a negative edge trigger. Data can be transferred at rates up to 50 MHz.
7 U/D
Up/Down Selection Counter Control.
8 CS
Chip Select. Active Low.
EPAD
Exposed Pad. The exposed pad is internally floating.
Rev. 0 | Page 11 of 24
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