Datenblatt-pdf.com


CAT24M01 Schematic ( PDF Datasheet ) - ON Semiconductor

Teilenummer CAT24M01
Beschreibung 1 Mb I2C CMOS Serial EEPROM
Hersteller ON Semiconductor
Logo ON Semiconductor Logo 




Gesamt 14 Seiten
CAT24M01 Datasheet, Funktion
CAT24M01
1 Mb I2C CMOS Serial
EEPROM
Description
The CAT24M01 is a 1024 kb Serial CMOS EEPROM, internally
organized as 131,072 words of 8 bits each.
It features a 256byte page write buffer and supports the Standard
(100 kHz), Fast (400 kHz) and FastPlus (1 MHz) I2C protocol.
Write operations can be inhibited by taking the WP pin High (this
protects the entire memory).
External address pins make it possible to address up to four
CAT24M01 devices on the same bus.
Features
Supports Standard, Fast and FastPlus I2C Protocol
1.8 V to 5.5 V Supply Voltage Range
256Byte Page Write Buffer
Hardware Write Protection for Entire Memory
Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs
(SCL and SDA)
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial and Extended Temperature Range
8pin PDIP, SOIC, TSSOP and 8pad UDFN Packages
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
VCC
SCL
A2, A1
WP
CAT24M01
SDA
VSS
Figure 1. Functional Symbol
http://onsemi.com
SOIC8
W SUFFIX
CASE 751BD
UDFN8*
HU5 SUFFIX
CASE 517BU
SOIC8
X SUFFIX
CASE 751BE
PDIP8
L SUFFIX
CASE 646AA
TSSOP8*
Y SUFFIX
CASE 948AL
PIN CONFIGURATION
NC 1
VCC
A1 WP
A2 SCL
VSS SDA
PDIP (L), SOIC (W, X),
TSSOP (Y)*, UDFN (HU5)*
For the location of Pin 1, please consult the
corresponding package drawing.
* Contact factory for availability
Pin Name
A1, A2
SDA
SCL
WP
VCC
VSS
PIN FUNCTION
Function
Device Address
Serial Data
Serial Clock
Write Protect
Power Supply
Ground
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
www.DatMaSahye,e2t04U11.netRev. 1
1
Publication Order Number:
CAT24M01/D






CAT24M01 Datasheet, Funktion
CAT24M01
WRITE OPERATIONS
Byte Write
In Byte Write mode the Master sends a START, followed
by Slave address, two byte address and data to be written
(Figure 6). The Slave acknowledges all 4 bytes, and the
Master then follows up with a STOP, which in turn starts the
internal Write operation (Figure 7). During internal Write,
the Slave will not acknowledge any Read or Write request
from the Master.
Page Write
The CAT24M01 contains 131,072 bytes of data, arranged
in 512 pages of 256 bytes each. The most significant 9 bits
of the address word (a16 from the Slave Address byte and
most significant Address byte) identify the page and the last
8 bits identify the byte within the page. The 17bit address
word (a16 from the Slave Address byte followed by two
address bytes) points to the first byte to be written. Up to 256
bytes can be written in one Write cycle (Figure 8).
The internal byte address counter is automatically
incremented after each data byte is loaded. If the Master
transmits more than 256 data bytes, then earlier bytes will be
overwritten by later bytes in a ‘wraparound’ fashion
(within the selected page). The internal Write cycle starts
immediately following the STOP.
During an internal Write operation, new data provided
by Byte Write or Page Write instructions will replace data
previously stored at the corresponding address locations,
while data stored at all other address locations within the
same page will be refreshed. Thus, whether writing one
byte or 256 bytes to a page, the entire page will be
reprogrammed with the corresponding combination of
new and old data.
Acknowledge Polling
Acknowledge polling can be used to determine if the
CAT24M01 is busy writing or is ready to accept commands.
Polling is implemented by interrogating the device with a
‘Selective Read’ command (see READ OPERATIONS).
The CAT24M01 will not acknowledge the Slave address,
as long as internal Write is in progress.
Hardware Write Protection
With the WP pin held HIGH, the entire memory is
protected against Write operations. If the WP pin is left
floating or is grounded, it has no impact on the operation of
the CAT24M01. The state of the WP pin is strobed on the last
falling edge of SCL immediately preceding the first data
byte (Figure 9). If the WP pin is HIGH during the strobe
interval, the CAT24M01 will not acknowledge the data byte
and the Write request will be rejected.
Delivery State
The CAT24M01 is shipped erased, i.e., all bytes are FFh.
http://onsemi.com
6

6 Page









CAT24M01 pdf, datenblatt
CAT24M01
PACKAGE DIMENSIONS
SOIC8, 208 mils
CASE 751BE01
ISSUE O
E1 E
PIN#1 IDENTIFICATION
TOP VIEW
D
SYMBOL
A
A1
b
c
D
E
E1
e
L
θ
MIN
0.05
0.36
0.19
5.13
7.75
5.13
0.51
NOM
1.27 BSC
MAX
2.03
0.25
0.48
0.25
5.33
8.26
5.38
0.76
Aq
eb
SIDE VIEW
A1
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with EIAJ EDR-7320.
L
END VIEW
c
http://onsemi.com
12

12 Page





SeitenGesamt 14 Seiten
PDF Download[ CAT24M01 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
CAT24M011 Mb I2C CMOS Serial EEPROMON Semiconductor
ON Semiconductor

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche