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ADATE318 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADATE318
Beschreibung 600 MHz Dual Integrated DCL
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
ADATE318 Datasheet, Funktion
www.DataSheet4U.net
600 MHz Dual Integrated DCL with PPMU, VHH Drive
Capability, Level Setting DACs, and On-Chip Calibration
Engine
ADATE318
FEATURES
600 MHz/1200 Mbps data rate
3-level driver with high-Z and reflection clamps
Window and differential comparators
±25 mA active load
Per pin PPMU with −2.0 V to +6.5 V range
Low leakage mode (typically 4 nA)
Integrated 16-bit DACs with offset and gain correction
High speed operating voltage range: –1.5 V to +6.5 V
Dedicated VHH output pin range: 0.0 V to 13.5 V
1.1 W power dissipation per channel
Driver
3-level voltage range: –1.5 V to +6.5 V
Precision trimmed output resistance
Unterminated swing: 200 mV minimum to 8 V maximum
725 ps minimum pulse width, VIH − VIL = 2.0 V
Comparator
Differential and single-ended window modes
>1.2 GHz input equivalent bandwidth
Load
±25 mA current range
Per pin PPMU (PPMU)
Force voltage/compliance range: –2.0 V to +6.5 V
5 current ranges: 40 mA, 1 mA, 100 μA, 10 μA, 2 μA
External sense input for system PMU
Go/no-go comparators
Levels
Fully integrated 16-bit DACs
On-chip gain and offset calibration registers and
add/multiply engine
Package
84-lead 10 mm × 10 mm LFCSP (0.4 mm pitch)
APPLICATIONS
Automatic test equipment
Semiconductor test systems
Board test systems
Instrumentation and characterization equipment
GENERAL DESCRIPTION
The ADATE318 is a complete, single-chip ATE solution that
performs the pin electronics functions of driver, comparator,
and active load (DCL), four quadrant, per pin, parametric
measurement unit (PPMU). It has VHH drive capability per
chip to support flash memory testing applications and integ-
rated 16-bit DACs with an on-chip calibration engine to
provide all necessary dc levels for operation of the part.
The driver features three active states: data high, data low, and
terminate mode, as well as a high impedance inhibit state. The
inhibit state, in conjunction with the integrated dynamic
clamps, facilitates the implementation of a high speed active
termination. The output voltage capability is −1.5 V to +6.5 V
to accommodate a wide range of ATE and instrumentation
applications.
The ADATE318 can be used as a dual, single-ended drive/
receive channel or as a single differential drive/receive channel.
Each channel of the ADATE318 features a high speed window
comparator as well as a programmable threshold differential
comparator for differential ATE applications. A four quadrant
PPMU is also provided per channel.
All dc levels for DCL and PPMU functions are generated by 24
on-chip 16-bit DACs. To facilitate accurate levels programming,
the ADATE318 contains an integrated calibration function to
correct gain and offset errors for each functional block.
Correction coefficients can be stored on chip, and any values
written to the DACs are automatically adjusted using the
appropriate correction factors.
The ADATE318 uses a serial programmable interface (SPI) bus
to program all functional blocks, DACs, and on-chip calibration
constants. It also has an on-chip temperature sensor and
over/undervoltage fault clamps for monitoring and reporting
the device temperature and any output pin or PPMU voltage
faults that may occur during operation.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.






ADATE318 Datasheet, Funktion
ADATE318
Parameter
VIH, VIL, VIT Resolution
DUTGND Voltage Accuracy
DC Levels Interaction
VIH vs. VIL
VIH vs. VIT
VIL vs. VIH
VIL vs. VIT
VIT vs. VIH
VIT vs. VIL
Overall Voltage Accuracy
VIH, VIL, VIT DC PSRR
AC SPECIFICATIONS
Rise/Fall Times
0.2 V Programmed Swing, TRISE
0.2 V Programmed Swing, TFALL
0.5 V Programmed Swing, TRISE
0.5 V Programmed Swing, TFALL
1.0 V Programmed Swing, TRISE
1.0 V Programmed Swing, TFALL
2.0 V Programmed Swing, TRISE
2.0 V Programmed Swing, TFALL
3.0 V Programmed Swing, TRISE
3.0 V Programmed Swing, TFALL
5.0 V Programmed Swing, TRISE
5.0 V Programmed Swing, TFALL
Rise to Fall Matching
Minimum Pulse Width
0.5 V Programmed Swing
Maximum Toggle Rate
1.0 V Programmed Swing
Min Typ Max Unit
Test
Level
Conditions
153 μV D
−7 ±2 +7 mV
P
Over ±0.1 V range; measured at end points of VIH, VIL, and
VIT functional range
DC interaction on VIL, VIH, and VIT output level while other
driver DAC levels are varied
±0.2
mV CT
Monitor interaction on VIH = +6.5 V; sweep VIL = −1.5 V to
+6.4 V, VIT = +1.0 V
±1
mV CT
Monitor interaction on VIH = +6.5 V; sweep VIT = −1.5 V to
+6.5 V, VIL = 0.0 V
±0.2
mV CT
Monitor interaction on VIL = −1.5 V; sweep VIH = −1.4 V to
+6.5 V, VIT = +1.0 V
±1
mV CT
Monitor interaction on VIL = −1.5 V; sweep VIT = −1.5 V to
+6.5 V, VIH = +2.0 V
±1
mV CT
Monitor interaction on VIT = +1.0 V; sweep VIH = −1.4 V to
+6.5 V, VIL = −1.5 V
±1
mV CT
Monitor interaction on VIT = +1.0 V; sweep VIL = −1.5 V to
+6.4 V, VIH = +6.5 V
±8
mV CT
VIH − VIL ≥ 100 mV; sum of INL, dc interaction, DUTGND,
and tempco errors over ±5ºC, after calibration
±10
mV/V
CT
Measured at calibration points
All ac specifications performed after calibration
Toggle DATx
215 ps CB 20% to 80%, VIH = 0.2 V, VIL = 0.0 V, terminated
277 ps CB 20% to 80%, VIH = 0.2 V, VIL = 0.0 V, terminated
218 ps CB 20% to 80%, VIH = 0.5 V, VIL = 0.0 V, terminated
274 ps CB 20% to 80%, VIH = 0.5 V, VIL = 0.0 V, terminated
150 222 320 ps
P
20% to 80%, VIH = 1.0 V, VIL = 0.0 V, terminated
150 283 320 ps
P
20% to 80%, VIH = 1.0 V, VIL = 0.0 V, terminated
297 ps CB 20% to 80%, VIH = 2.0 V, VIL = 0.0 V, terminated
322 ps CB 20% to 80%, VIH = 2.0 V, VIL = 0.0 V, terminated
447 ps CB 20% to 80%, VIH = 3.0 V, VIL = 0.0 V, terminated
397 ps CB 20% to 80%, VIH = 3.0 V, VIL = 0.0 V, terminated
1117
ps CB 10% to 90%, VIH = 5.0 V, VIL = 0.0 V, unterminated
798 ps CB 10% to 90%, VIH = 5.0 V, VIL = 0.0 V, unterminated
−25 ps CB Rise to fall within one channel, VIH = 2.0 V, VIL = 0.0 V,
terminated
−61 ps CB Rise to fall within one channel; VIH = 1.0 V, VIL = 0.0 V,
terminated
Toggle DATx
725 ps CB VIH = 0.5 V, VIL = 0.0 V, terminated, timing error less than
+69/−33 ps
725 ps CB VIH = 0.5 V, VIL = 0.0 V, terminated, less than 10%
amplitude loss
2040
Mbps CB
VIH = 0.5 V, VIL = 0.0 V, terminated, less than 10% loss at
50% duty
725 ps CB VIH = 1.0 V, VIL = 0.0 V, terminated, timing error less than
+58/−35 ps
725 ps CB VIH = 1.0 V, VIL = 0.0 V, terminated, less than 10%
amplitude loss
Rev. 0 | Page 6 of 80

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ADATE318 pdf, datenblatt
ADATE318
Table 6. Active Load
Parameter
DC SPECIFICATIONS
Input Characteristics
Min Typ Max Unit
Test
Level
Conditions
Load active on, RCVx active, unless otherwise noted
VCOM Voltage Range
VCOM Offset
VCOM Offset Tempco
VCOM Gain
−1.5
−1.0
−200
1.0
±25
+6.5
+5.5
+200
1.1
V
V
mV
μV/°C
V/V
D
D
P
CT
P
VCOM Gain Tempco
VCOM Resolution
VCOM DNL
±25 ppm/°C CT
153 μV D
±1 mV CT
VCOM INL
DUTGND Voltage
Accuracy
Output Characteristics
Maximum Source
Current
IOL Offset
IOL Offset Tempco
IOL Gain Error
−7 +7 mV P
−7 ±2 +7 mV P
25
−600
+600
mA
μA
D
P
±1
μA/°C
CT
0
25 %
P
IOL Gain Tempco
IOL Resolution
IOL DNL
±25 ppm/°C CT
763 nA D
±4 μA CT
IOL INL
−100 ±20
+100
μA
IOL 90% Commutation
Voltage
0.25 0.4
V
IOL 90% Commutation
Voltage
0.1
V
Maximum Sink Current
IOH Offset
25
−600
+600
mA
μA
P
P
CT
D
P
IOH Offset Tempco
±1
μA/°C
CT
IOH Gain Error
0
25 %
P
| IOL and IOH | ≤ 1 mA
| IOL and IOH | ≤ 25 mA
Measured at DAC Code 0x4000, uncalibrated
Gain derived from measurements at DAC Code 0x4000 (0 V) and
DAC Code 0xC000 (+5 V), based on ideal DAC transfer function (see
Table 21)
IOH = IOL = 12.5 mA; after two point gain/offset calibration;
measured over VCOM range of 1.5 V to +6.5 V; calibration points
at 0x4000 (0 V) and 0xC000 (+5 V)
IOH = IOL = 12.5 mA; after two point gain/offset calibration;
measured at end points of VCOM functional range
Over ±0.1 V range
1.5 V to +5.5 V DUT range
IOH = −2.5 mA, VCOM = 1.5 V, VDUTx = 0.0 V; offset extrapolated
from measurements at DAC Code 0x451F (1 mA) and DAC Code
0xA666 (20 mA)
IOH = −2.5 mA, VCOM = 1.5 V, VDUTx = 0.0 V; gain derived from
measurements at DAC Code 0x451F (1 mA) and DAC Code 0xA666
(20 mA); based on ideal DAC transfer function (see Table 21 and
Table 22)
IOH = −2.5 mA, VCOM = 1.5 V, VDUTx = 0.0 V; after two point
gain/offset calibration; measured over IOL range, 0 mA to 25 mA;
calibrated at Code 0x451F (1 mA) and Code 0xA666 (20 mA)
IOH = −2.5 mA, VCOM = 1.5 V, VDUTx = 0.0 V; after two point
gain/offset calibration
IOH = IOL = 25 mA, VCOM = 2.0 V; measure IOL reference at
VDUTx = −1.0 V; measure IOL current at VDUTx = 1.6 V; check
>90% of reference current
IOH = IOL = 1 mA, VCOM = 2.0 V; measure IOL reference at
VDUTx = −1.0 V; measure IOL current at VDUTx = 1.9 V; check
>90% of reference current
1.0 V to +6.5 V output range
IOL = −2.5 mA, VCOM = 1.5 V, VDUTx = 3.0 V; offset extrapolated
from measurements at DAC Code 0x451F (1 mA) and DAC Code
0xA666 (20 mA)
IOL = −2.5 mA, VCOM = 1.5 V, VDUTx = 3.0 V; gain derived from
measurements at DAC Code 0x451F (1 mA) and DAC Code 0xA666
(20 mA); based on ideal DAC transfer function (see Table 21 and
Table 22)
Rev. 0 | Page 12 of 80

12 Page





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