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PDF ADATE302-02 Data sheet ( Hoja de datos )
| Número de pieza | ADATE302-02 | |
| Descripción | 500 MHz Dual Integrated DCL | |
| Fabricantes | Analog Devices | |
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500 MHz Dual Integrated DCL with Differential
Drive/Receive, Level Setting DACs, and Per Pin PMU
ADATE302-02
FEATURES
Driver
3-level driver with high-Z mode and built-in clamps
Precision trimmed output resistance
Low leakage mode (typically <10 nA)
Voltage range: −2.0 V to +6.0 V
1.0 ns minimum pulse width, 1 V terminated
Comparator
Window and differential comparator
>1 GHz input equivalent bandwidth
Load
±12 mA maximum current capability
Per pin PMU
Force voltage range: −2.0 V to +6.0 V
5 current ranges: 25 mA, 2 mA, 200 μA, 20 μA, and 2 μA
Levels
14-bit DAC for DCL levels
Typically <±5 mV INL (calibrated)
16-bit DAC for PMU levels
Typically <±1.5 mV INL (calibrated) linearity in FV mode
HVOUT output buffer
0 V to 13.5 V output range
84-ball, 9 mm × 9 mm, flip-chip BGA package
1.7 W per channel with no load
APPLICATIONS
Automatic test equipment
Semiconductor test systems
Board test systems
Instrumentation and characterization equipment
GENERAL DESCRIPTION
The ADATE302-02 is a complete, single-chip solution that
performs the pin electronic functions of the driver, the compa-
rator, and the active load (DCL), per pin PMU, and dc levels for
ATE applications. The device also contains an HVOUT driver
with a VHH buffer capable of generating up to 13.5 V.
The driver features three active states: data high mode, data low
mode, and term mode, as well as an inhibit state. The inhibit
state, in conjunction with the integrated dynamic clamp, facilitates
the implementation of a high speed active termination. The output
voltage range is −2.0 V to +6.0 V to accommodate a wide
variety of test devices.
The ADATE302-02 can be used as either a dual single-ended
drive/receive channel or a single differential drive/receive
channel. Each channel of the ADATE302-02 features a high
speed window comparator per pin for functional testing as well
as a per pin PMU with FV or FI and MV or MI functions. All
necessary dc levels for DCL functions are generated by on-chip
14-bit DACs. The per pin PMU features an on-chip 16-bit DAC
for high accuracy and contains integrated range resistors to
minimize external component counts.
The ADATE302-02 uses a serial bus to program all functional
blocks and has an on-board temperature sensor for monitoring
the device temperature.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
1 page  
ADATE302-02
DRIVER
VH − VL ≥ 200 mV (to meet dc/ac specifications).
Table 2.
Parameter
DC SPECIFICATIONS
High-Speed Differential Logic Input
Characteristics (DATAx, RCVx)
Input Termination Resistance
Input Voltage Differential
Common-Mode Voltage
Input Bias Current
Pin Output Characteristics
Output High Range, VH
Output Low Range, VL
Output Term Range, VT
Functional Amplitude (VH − VL)
DC Output Current Limit Source
DC Output Current Limit Sink
Output Resistance, ±50 mA
ABSOLUTE ACCURACY
VH, VL, VT Uncalibrated Accuracy
VH, VL, VT Offset Tempco
VH, VL, VT DNL
VH, VL, VT INL
VH, VL, VT Resolution
DUTGND Voltage Accuracy
VH, VL, VT Crosstalk
Overall Voltage Accuracy
VH, VL, VT DC PSRR
AC SPECIFICATIONS
Rise/Fall Times
0.2 V Programmed Swing
1.0 V Programmed Swing
1.8 V Programmed Swing
2.0 V Programmed Swing
3.0 V Programmed Swing
3.0 V Programmed Swing
5.0 V Programmed Swing
Rise to Fall Matching
Min Typ
92 100
0.2
0.85
−20.0
+4.0
−1.9
−2.0
−2.0
0.0 8.0
75 100
−120 −100
45.0 48.5
−300
−10
±75
±450
±1
±2.5
0.6
−7 ±1.3
±2
±10
±15
683
521
430 524
531
589
811
1105
6
Test
Max Unit Level Conditions/Comments
108 Ω
1.0
2.35
+20.0
V
V
μA
P
PF
PF
P
Push 6 mA into xP pins, force 1.3 V on xN pins; measure
voltage from xP to xN, calculate resistance (V/I)
Each pin tested at 2.85 V and 0.35 V, while other high speed
pin left open
+6.0 V
+5.9 V
+6.0 V
V
120 mA
−75 mA
51.0 Ω
D
D
D
D
P
P
P
+300
+10
mV
μV/°C
mV
mV
P
CT
CT
P
1 mV PF
+7 mV P
mV CT
mV CT
mV/V CT
Amplitude can be programmed to VH = VL, accuracy
specifications apply when VH − VL ≥ 200 mV
Driver high, VH = 6.0 V, short DUTx pin to −2.0 V, measure
current
Driver low, VL = −2.0 V, short DUTx pin to 6.0 V, measure current
Source: driver high, VH = 3.0 V, IDUTx = 1 mA and 50 mA;
sink: driver low, VL = 0.0 V, IDUTx = −1 mA and −50 mA; ΔVDUTx/ΔIDUTx
VH tests done with VL = −2.5 V and VT = −2.5 V;
VL tests done with VH = 7.5 V and VT = 7.5 V;
VT tests done with VL = −2.5 V and VH = 7.5 V;
unless otherwise specified
Error measured at calibration points of 0 V and 5 V
Measured at calibration points
After two-point gain/offset calibration
After two-point gain/offset calibration; measured over driver
output ranges
After two-point gain/offset calibration; range/number of DAC
bits as measured at calibration points of 0 V and 5 V
Over ±0.1 V range; measured at end points of VH, VL, and VT
functional range
VL = −2.0 V: VH = −1.9 V → 6.0 V, VT = −2.0 V → 6.0 V;
VH = 6.0 V: VL = −2.0 V → 5.9 V, VT = −2.0 V → 6.0 V;
VT = 1.5 V: VL = −2.0 V → 5.9 V, VH = −1.9 V → 6.0 V;
dc crosstalk on VL, VH, VT output level when other driver
DACs are varied
Sum of INL, crosstalk, DUTGND, and tempco over ±5°C,
after gain/offset calibration
Measured at calibration points
ps
ps
630 ps
ps
ps
ps
ps
ps
Toggle DATAx pins
CB VH = 0.2 V, VL = 0.0 V, terminated; 20% to 80%
CB VH = 1.0 V, VL = 0.0 V, terminated; 20% to 80%
P/CB VH = 1.8 V, VL = 0.0 V, terminated; 20% to 80%
CB VH = 2.0 V, VL = 0.0 V, terminated; 20% to 80%
CB VH = 3.0 V, VL = 0.0 V, terminated; 20% to 80%
CB VH = 3.0 V, VL = 0.0 V, unterminated; 10% to 90%
CB VH = 5.0 V, VL = 0.0 V, unterminated; 10% to 90%
CB VH = 1.0 V, VL = 0.0 V, terminated; rise to fall within one channel
Rev. 0 | Page 5 of 52
5 Page 
ADATE302-02
Parameter
Min Typ
Test
Max Unit Level Conditions/Comments
AC SPECIFICATIONS
Load active on, unless otherwise noted
Dynamic Performance
Propagation Delay, Load Active On
to Load Active Off; 50%, 90%
4.1
ns CB Toggle RCVx pins, DUTx terminated 50 Ω to GND,
IOH = IOL = 12 mA, VH = VL = 0 V, VCOM = +1.25 V for
IOL and VCOM = −1.25 V for IOH; measured from 50%
point of RCVxP − RCVxN to 90% point of final output,
repeat for drive low and high
Propagation Delay, Load Active Off
to Load Active On; 50%, 90%
11
ns CB Toggle RCVx pins, DUTx terminated 50 Ω to GND,
IOH = IOL = 12 mA, VH = VL = 0 V, VCOM = +1.25 V for
IOL and VCOM = −1.25 V for IOH; measured from 50%
point of RCVxP − RCVxN to 90% point of final output,
repeat for drive low and high
Propagation Delay Matching
6.9 ns CB Toggle RCVx pins, DUTx terminated 50 Ω to GND,
IOH = IOL = 12 mA, VH = VL = 0 V, VCOM = +1.25 V for
IOL and VCOM = −1.25 V for IOH; active on vs. active
off, repeat for drive low and high
Load Spike
156 mV CB Toggle RCVx pins, DUTx terminated 50 Ω to GND,
IOH = IOL = 0 mA, VH = VL = 0 V, VCOM = +1.25 V for
IOL and VCOM = −1.25 V for IOH; repeat for drive low
and high
Settling Time to 90%
1.6 ns CB Toggle RCVx pins, DUTx terminated 50 Ω to GND,
IOH = IOL = 12 mA, VH = VL = 0 V, VCOM = +1.25 V for
IOL and VCOM= −1.25 V for IOH; measured at 90% of
final value
PMU
FV = force voltage, MV = measure voltage, FI = force current, MI = measure current, FN = force nothing.
Table 7.
Parameter
FORCE VOLTAGE (FV)
Current Range A
Current Range B
Current Range C
Current Range D
Current Range E
Force Input Voltage Range at
Output For All Ranges
Force Voltage Uncalibrated
Accuracy for Range C
Force Voltage Uncalibrated
Accuracy for All Ranges
Force Voltage Offset Tempco
for All Ranges
Force Voltage Gain Tempco
for All Ranges
Forced Voltage INL
Force Voltage Compliance vs.
Current Load
Range A
Range B to Range E
Min Typ
±25
±2
±200
±20
±2
−2.0
−100 ±25
±25
±25
±75
−7 ±2
±4
±1
Max Unit
Test
Level Conditions/Comments
mA
mA
μA
μA
μA
+6.0 V
D
D
D
D
D
D
+100 mV
P
mV CT
μV/°C CT
ppm/°C CT
+7 mV
P
mV CT
mV CT
PMU enabled, FV, PE disabled, error measured at calibration
points of 0 V and 5 V
PMU enabled, FV, PE disabled, error measured at calibration
points of 0 V and 5 V; repeat for each PMU current range
Measured at calibration points for each PMU current range
Measured at calibration points for each PMU current range
PMU enabled, FV, Range C, PE disabled, after two-point gain/
offset calibration; measured over output range of −2.0 V to
+6.0 V
PMU enabled, FV, PE disabled, force −2.0 V, measure voltage
while PMU sinking zero- and full-scale current; measure ∆V;
force 6.0 V, measure voltage while PMU sourcing zero- and full-
scale current; measure ∆V; repeat for each PMU current range
Rev. 0 | Page 11 of 52
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADATE302-02.PDF ] | |
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