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PDF DS24B33 Data sheet ( Hoja de datos )
| Número de pieza | DS24B33 | |
| Descripción | 4Kb 1-Wire EEPROM | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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AVAILABLE
DS24B33
1-Wire 4Kb EEPROM
General Description
The DS24B33 is a 4096-bit, 1-Wire® EEPROM orga-
nized as 16 memory pages of 256 bits each. Data is
written to a 32-byte scratchpad, verified, and then
copied to the EEPROM memory. The DS24B33 commu-
nicates over a single-conductor 1-Wire bus. The com-
munication follows the standard 1-Wire protocol. Each
device has its own unalterable and unique 64-bit regis-
tration number that is factory programmed into the chip.
The registration number is used to address the device
in a multidrop 1-Wire net environment. The DS24B33 is
software compatible to the DS2433.
Applications
Storage of Calibration Constants
Board Identification
Storage of Product Revision Status
Typical Operating Circuit
VCC
µC
RPUP
IO
DS24B33
Functional Diagrams
GND
Features
o 4096 Bits of Nonvolatile EEPROM Partitioned Into
Sixteen 256-Bit Pages
o Read and Write Access is Highly Backward-
Compatible to the DS2433
o 256-Bit Scratchpad with Strict Read/Write
Protocols Ensures Integrity of Data Transfer
o Unique, Factory-Programmed, 64-Bit Registration
Number Ensures Error-Free Device Selection and
Absolute Part Identity
o Switchpoint Hysteresis to Optimize Performance
in the Presence of Noise
o Communicates to Host at 15.4kbps or 125kbps
Using 1-Wire Protocol
o Low-Cost Through-Hole and SMD Packages
o Operating Range: +2.8V to +5.25V, -40°C to +85°C
o IEC 1000-4-2 Level 4 ESD Protection (±8kV
Contact, ±15kV Air, Typical) for IO Pin
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
DS24B33+
-40°C to +85°C TO-92
DS24B33+T&R -40°C to +85°C TO-92
DS24B33G+T&R -40°C to +85°C 2 SFN (2.5k pcs)
DS24B33Q+T&R -40°C to +85°C 6 TDFN-EP* (2.5k pcs)
DS24B33S+
-40°C to +85°C 8 SO (208 mils)
DS24B33S+T&R -40°C to +85°C 8 SO (208 mils)
Note: The leads of TO-92 packages on tape and reel are formed
to approximately 100-mil (2.54mm) spacing. For details, refer to
the package outline drawing.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
*EP = Exposed pad.
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
U1-CWSirPeisisaatraedgeismtearrekdotfraMdaexmimarInktoefgMraatexdimPrInotdeugcrtast,eIdncP.roducts, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-5759; Rev 3; 5/12
1 page  
DS24B33
1-Wire 4Kb EEPROM
Pin Description
SFN
2
1
—
PIN
TDFN-EP TO-92
31
22
1, 4, 5, 6
3
SO
4
3
1, 2, 5–8
NAME
GND
IO
N.C.
FUNCTION
Ground Reference
1-Wire Bus Interface. Open-drain pin that requires external pullup
Not Connected
Exposed Pad (TDFN only). Solder evenly to the board’s ground plane for
— — — — EP proper operation. Refer to Application Note 3273: Exposed Pads: A Brief
Introduction for additional information.
Detailed Description
The DS24B33 combines 4Kb of data EEPROM with a
fully featured 1-Wire interface in a single chip. The
memory is organized as 16 pages of 256 bits each. A
volatile 256-bit memory page called the scratchpad
acts as a buffer when writing data to the EEPROM to
ensure data integrity. Data is first written to the scratch-
pad, from which it can be read back for verification
before transferring it to the EEPROM. The operation of
the DS24B33 is controlled over the single-conductor
1-Wire bus. Device communication follows the standard
1-Wire protocol. The energy required to read and write
the DS24B33 is derived entirely from the 1-Wire com-
munication line. Each DS24B33 has its own unalterable
and unique 64-bit registration number. The registration
number guarantees unique identification and is used to
address the device in a multidrop 1-Wire net environ-
ment. Multiple DS24B33 devices can reside on a com-
mon 1-Wire bus and be operated independently of
each other. Applications of the DS24B33 include cali-
bration data storage, PCB identification, and storage of
product revision status. The DS24B33 provides a high
degree of backward compatibility with the DS2433,
including having the same family code.
Overview
Figure 1 shows the relationships between the major
control and memory sections of the DS24B33. The
DS24B33 has four main data components: 64-bit
PARASITE POWER
1-Wire NET
1-Wire FUNCTION
CONTROL
64-BIT REGISTRATION
NUMBER
DS24B33
Figure 1. Block Diagram
Maxim Integrated
MEMORY
FUNCTION
CONTROL UNIT
CRC-16
GENERATOR
DATA MEMORY
16 PAGES OF
32 BYTES EACH
32-BYTE
SCRATCHPAD
5
5 Page 
DS24B33
1-Wire 4Kb EEPROM
FROM FIGURE 7a
55h
COPY SCRATCHPAD?
N
Y
BUS MASTER Rx
TA1 (T[7:0]), TA2 (T[15:8]),
AND E/S BYTE
F0h
READ MEMORY?
N
Y
BUS MASTER Tx
TA1 (T[7:0]), TA2 (T[15:8])
TO FIGURE 7a
AUTHORIZATION
CODE MATCH?
N
Y
N
AA = 1
DS24B33 COPIES
SCRATCHPAD DATA
TO ADDRESS
*
DS24B33 Tx "0"
BUS MASTER
Rx "1"s
Y
MASTER Tx RESET?
N
DS24B33 Tx "1"
MASTER Tx RESET?
Y
N
MASTER Tx RESET?
Y
N
BUS MASTER
Rx "1"s
N
MASTER Tx RESET?
Y
DS24B33 SETS MEMORY
ADDRESS = (T[15:0])
DS24B33
INCREMENTS
ADDRESS
COUNTER
BUS MASTER Rx
DATA BYTE FROM
MEMORY ADDRESS
MASTER Tx RESET?
Y
N
Y
ADDRESS < 1FFh?
N
BUS MASTER
Rx "1"s
N
MASTER Tx RESET?
Y
*1-Wire IDLE HIGH FOR tPROG FOR POWER.
Figure 7b. Memory Function Flowchart (continued)
Maxim Integrated
11
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet DS24B33.PDF ] | |
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