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Número de pieza | R1LV1616HSA-5SI | |
Descripción | Wide Temperature Range Version 16M SRAM | |
Fabricantes | Renesas Technology | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de R1LV1616HSA-5SI (archivo pdf) en la parte inferior de esta página. Total 21 Páginas | ||
No Preview Available ! R1LV1616H-I Series
Wide Temperature Range Version
16 M SRAM (1-Mword × 16-bit / 2-Mword × 8-bit)
REJ03C0195-0101
Rev.1.01
Nov.18.2004
Description
The R1LV1616H-I Series is 16-Mbit static RAM organized 1-Mword × 16-bit / 2-Mword × 8-bit.
R1LV1616H-I Series has realized higher density, higher performance and low power consumption by
employing CMOS process technology (6-transistor memory cell). It offers low power standby power
dissipation; therefore, it is suitable for battery backup systems. It is packaged in 48-pin plastic TSOPI for
high density surface mounting.
Features
• Single 3.0 V supply: 2.7 V to 3.6 V
• Fast access time: 45/55 ns (max)
• Power dissipation:
Active: 9 mW/MHz (typ)
Standby: 1.5 µW (typ)
• Completely static memory.
No clock or timing strobe required
• Equal access and cycle times
• Common data input and output.
Three state output
• Battery backup operation.
2 chip selection for battery backup
• Temperature range: −40 to +85°C
• Byte function (×8 mode) available by BYTE# & A-1.
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Rev.1.01, Nov.18.2004, page 1 of 19
1 page R1LV1616H-I Series
Block Diagram (TSOP)
LSB A15
A14
A13
A12
A11
A10
A9
A8
A18
A16
A19
A4
A5
MSB
Row
decoder
•
•
•
•
•
Memory matrix
8,192 x 128 x 16
8,192 x 256 x 8
V CC
V SS
I/O0
I/O15
BYTE#
CS2
CS1#
LB#
UB#
WE#
OE#
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Input
data
control
•
•
Column I/O
Column decoder
•
•
MSBA17 A7A6 A3 A2 A1A0 A-1 LSB
••
Control logic
Rev.1.01, Nov.18.2004, page 5 of 19
5 Page R1LV1616H-I Series
Read Cycle
Parameter
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Output hold from address change
LB#, UB# access time
Chip select to output in low-Z
LB#, UB# enable to low-Z
Output enable to output in low-Z
Chip deselect to output in high-Z
LB#, UB# disable to high-Z
Output disable to output in high-Z
Write Cycle
Parameter
Write cycle time
Address valid to end of write
Chip selection to end of write
Write pulse width
LB#, UB# valid to end of write
Address setup time
Write recovery time
Data to write time overlap
Data hold from write time
Output active from end of write
www.DataSheeOt4uUtp.cuotmdisable to output in high-Z
Write to output in high-Z
Symbol
tRC
tAA
tACS1
tACS2
tOE
tOH
tBA
tCLZ1
tCLZ2
tBLZ
tOLZ
tCHZ1
tCHZ2
tBHZ
tOHZ
R1LV1616H-I
-4SI, -4LI
Min Max
45
45
45
45
30
10
45
10
10
5
5
0 20
0 20
0 15
0 15
-5SI
Min
55
10
10
10
5
5
0
0
0
0
Max
55
55
55
35
55
20
20
20
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2, 3
2, 3
2, 3
2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
Symbol
tWC
tAW
tCW
tWP
tBW
tAS
tWR
tDW
tDH
tOW
tOHZ
tWHZ
R1LV1616H-I
-4SI, -4LI
Min Max
45
45
45
35
45
0
0
25
0
5
0 15
0 15
-5SI
Min
55
50
50
40
50
0
0
25
0
5
0
0
Max
20
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
5
4
6
7
2
1, 2
1, 2
Rev.1.01, Nov.18.2004, page 11 of 19
11 Page |
Páginas | Total 21 Páginas | |
PDF Descargar | [ Datasheet R1LV1616HSA-5SI.PDF ] |
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