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PDF PCS3P73Z01AW Data sheet ( Hoja de datos )
| Número de pieza | PCS3P73Z01AW | |
| Descripción | Peak EMI Reduction IC | |
| Fabricantes | ON Semiconductor | |
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PCS3P73Z01AW
Wide Frequency Range
TIMING SAFEt Peak EMI
Reduction IC
Description
PCS3P73Z01AW is a 2.5 V / 3.3 V versatile EMI reduction IC based
on ON Semiconductor’s patent pending Timing−Safe technology.
PCS3P73Z01AW accepts one input from an external reference, and
locks on to it delivering a 1x Timing−Safe clock. PCS3P73Z01AW
has a Frequency Selection (FS) control that facilitates selecting one of
the two frequency ranges within the operating frequency range. Refer
to the Frequency Selection Table for details. The device has an
SSEXTR pin to select different deviation and associated Input−Output
Skew (TSKEW), depending upon the value of an external resistor
connected between SSEXTR and GND. PCS3P73Z01AW has a
DLY_CTRL for adjusting the Input−Output clock delay, depending
upon the value of capacitor connected at this pin to GND. PD#/OE
provides the Power Down option. Outputs will be tri−stated when
power down is active.
PCS3P73Z01AW operates from a 2.5 V / 3.3 V supply and is
available in an 8 Pin, TSSOP, and TDFN (2X2) COL Packages, over
Commercial and Industrial temperature range.
Application
PCS3P73Z01AW is targeted for use in Displays, Camera modules
and SDRAM memory interface systems.
Features
• 1x, LVCMOS Timing−Safe Peak EMI Reduction
• Input Frequency:
2 MHz − 16 MHz @ 2.5 V
2 MHz − 20 MHz @ 3.3 V
• Output Frequency (Timing−Safe):
2 MHz − 16 MHz @ 2.5 V
2 MHz − 20 MHz @ 3.3 V
• Analog Deviation Selection
• External Input−Output Delay Control Option
• Power Down Option for Power Save Mode
• Supply Voltage:
2.5 V ± 0.2 V
3.3 V ± 0.3 V
• Commercial and Industrial Temperature Range
• 8 pin, TSSOP, and TDFN(2X2) COL Packages
• The First True Drop−in Solution
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
http://onsemi.com
TSSOP−8
T SUFFIX
CASE 948AL
TDFN−8
C SUFFIX
CASE 511AQ
CLKIN
PD#/OE
FS
GND
PIN CONFIGURATION
1
VDD
SSEXTR
DLY_CTRL
ModOUT
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
August, 2011 − Rev. 2
1
Publication Order Number:
PCS3P73Z01AW/D
1 page  
OUTPUT
PCS3P73Z01AW
Switching Waveforms
t2
VDD/2
t1
VDD/2
Figure 2. Duty Cycle Timing
VDD/2
OUTPUT
80%
80%
20%
20%
t3 t4
Figure 3. All Outputs Rise/Fall Time
INPUT
OUTPUT
VDD/2
VDD/2
t5
Figure 4. Input − Output Propagation Delay
Timing−Safe
Input
Output
TSKEW−
TSKEW+
NOTE: Tskew is measured in
units of Clock Period
One clock cycle
N=1
TSKEW represents input−output
skew when Deviation is ON
For example, TSKEW = ± 0.20 for an
Input clock of 12 MHz, translates in
to (1/12 MHz) * 0.20 = 16.66 nS
Figure 5. Input − Output Skew
http://onsemi.com
5
5 Page 
PCS3P73Z01AW
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL−01
ISSUE O
b
e
TOP VIEW
D
A2
E1 E
A
SYMBOL
A
A1
A2
b
c
D
E
E1
e
L
L1
θ
MIN
0.05
0.80
0.19
0.09
2.90
6.30
4.30
0.50
0º
NOM
0.90
3.00
6.40
4.40
0.65 BSC
1.00 REF
0.60
MAX
1.20
0.15
1.05
0.30
0.20
3.10
6.50
4.50
0.75
8º
q1 c
SIDE VIEW
A1
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
L1
END VIEW
L
http://onsemi.com
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet PCS3P73Z01AW.PDF ] | |
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