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PCS3P624Z05C Schematic ( PDF Datasheet ) - PulseCore Semiconductor

Teilenummer PCS3P624Z05C
Beschreibung Low Frequency Timing-Safe Peak EMI reduction IC
Hersteller PulseCore Semiconductor
Logo PulseCore Semiconductor Logo 




Gesamt 15 Seiten
PCS3P624Z05C Datasheet, Funktion
May 2008
rev 0.1
PCS3P624Z05B/C
PCS3P624Z09B/C
High Frequency Timing-Safe™ Peak EMI reduction IC
General Features
High Frequency Clock distribution with Timing-
Safe™ Peak EMI Reduction
Input frequency range: 50MHz - 100MHz
Multiple low skew Timing-safe™ Outputs:
PCS3P624Z05: 5 Outputs
PCS3P624Z09: 9 Outputs
External Input-Output Delay Control option
Supply Voltage: 3.3V±0.3V
Commercial and Industrial temperature range
Packaging Information:
ASM3P624Z05: 8 pin SOIC, and TSSOP
ASM3P624Z09:16 pin SOIC, and TSSOP
True Drop-in Solution for Zero Delay Buffer,
ASM5P2305A / 09A
Functional Description
PCS3P624Z05/09 is a versatile, 3.3V Zero-delay buffer
designed to distribute high frequency Timing-Safe™ clocks
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with Peak EMI reduction. PCS3P624Z05 is an eight-pin
version, accepts one reference input and drives out five
low-skew Timing-Safe™ clocks. PCS3P624Z09 accepts
one reference input and drives out nine low-skew Timing-
Safe™clocks.
PCS3P624Z05/09 has a DLY_CTRL for adjusting the
Input-Output clock delay, depending upon the value of
capacitor connected at this pin to GND.
PCS3P624Z05/09 operates from a 3.3V supply and is
available in two different packages, as shown in the
ordering information table, over commercial and Industrial
temperature range.
Application
PCS3P624Z05/09 is targeted for use in Displays and
memory interface systems.
General Block Diagram
CLKIN
PLL
PCS3P624Z05B/C
DLY_CTRL
PLL MUX
CLKOUT1 CLKIN
CLKOUT2
CLKOUT3
CLKOUT4
S2
S1
Select Input
Decoding
PCS3P624Z09B/C
DLY_CTRL
CLKOUTA1
CLKOUTA2
CLKOUTA3
CLKOUTA4
CLKOUTB1
CLKOUTB2
CLKOUTB3
CLKOUTB4
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.






PCS3P624Z05C Datasheet, Funktion
May 2008
rev 0.1
Electrical Characteristics
Parameter
Description
Test Conditions
VIL Input LOW Voltage5
VIH Input HIGH Voltage5
IIL Input LOW Current
VIN = 0V
IIH Input HIGH Current
VOL Output LOW Voltage6
VOH Output HIGH Voltage6
VIN = VDD
IOL = 8mA
IOH = -8mA
IDD Dynamic Supply Current
Unloaded outputs
Zo Output Impedance
Note: 5. CLKIN input has a threshold voltage of VDD/2
6. Parameter is guaranteed by design and characterization. Not 100% tested in production
PCS3P624Z05B/C
PCS3P624Z09B/C
www.DataSheet4U.com
Min Typ Max Unit
0.8 V
2.0 V
50 µA
100 µA
0.4 V
2.4 V
40 mA
23
Switching Characteristics
Parameter
Test Conditions
Input Frequency
Output Frequency
Duty Cycle 7,8 = (t2 / t1) * 100
Output Rise Time 7, 8
Output Fall Time 7, 8
Output-to-output skew 7, 8
30pF load
Measured at VDD/2
Measured between 0.8V and 2.0V
Measured between 2.0V and 0.8V
All outputs equally loaded
Delay, CLKIN Rising Edge to
CLKOUT Rising Edge 8
Measured at VDD /2
Device-to-Device Skew 8
Cycle-to-Cycle Jitter 7, 8
Measured at VDD/2 on the CLKOUT pins
of the device
Loaded outputs
PLL Lock Time 8
Stable power supply, valid clock presented
on CLKIN pin
Note: 7. All parameters specified with 30pF loaded outputs.
8. Parameter is guaranteed by design and characterization. Not 100% tested in production
Min
50
50
40
Typ
50
Max
100
100
60
2.5
2.5
250
±350
700
±200
1.0
Unit
MHz
MHz
%
nS
nS
pS
pS
pS
pS
mS
High Frequency Timing-Safe™ Peak EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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PCS3P624Z05C pdf, datenblatt
May 2008
rev 0.1
PCS3P624Z05B/C
PCS3P624Z09B/C
16-lead TSSOP (4.40-MM Body)
81
EH
PIN 1 ID
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9 16 A
eB
D
A2 A1
Seating Plane
θ
L
C
Symbol
A
A1
A2
B
C
D
E
e
H
L
θ
Dimensions
Inches
Min Max
0.043
0.002
0.006
0.031
0.041
0.007
0.012
0.004
0.008
0.193
0.201
0.169
0.177
0.026 BSC
0.252 BSC
0.020
0.030
0° 8°
Millimeters
Min Max
1.20
0.05 0.15
0.80 1.05
0.19 0.30
0.09 0.20
4.90 5.10
4.30 4.50
0.65 BSC
6.40 BSC
0.50 0.75
0° 8°
High Frequency Timing-Safe™ Peak EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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