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C8051T605 Schematic ( PDF Datasheet ) - Silicon Laboratories

Teilenummer C8051T605
Beschreibung (C8051T601 - C8051T606) Mixed-Signal Byte-Programmable EPROM MCU
Hersteller Silicon Laboratories
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Gesamt 30 Seiten
C8051T605 Datasheet, Funktion
C8051T600/1/2/3/4/5/6
Mixed-Signal Byte-Programmable EPROM MCU
Analog Peripherals
- 10-Bit ADC (‘T600/602/604 only)
Up to 500 ksps
Up to 8 external inputs
VREF external pin, Internal Regulator or VDD
Internal or external start of conversion source
Built-in temperature sensor
- Comparator
Programmable hysteresis and response time
Configurable as interrupt or reset source
Low current
On-Chip Debug
- C8051F300 can be used as code development
platform; complete development kit available
- On-chip debug circuitry facilitates full speed,
non-intrusive in-system debug
- Provides breakpoints, single stepping,
inspect/modify memory and registers
Supply Voltage 1.8 to 3.6 V
- On-chip LDO for internal core supply
- Built-in voltage supply monitor
Temperature Range: –40 to +85 °C
Package Options:
- 3 x 3 mm QFN11
- 2 x 2 mm QFN10 (C8051T606 Only)
- MSOP10 (C8051T606 Only)
- SOIC14 (C8051T600/1/2/3/4/5 Only)
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- Expanded interrupt handler
Memory
- 256 or 128 Bytes internal data RAM
- 8, 4, 2, or 1.5 kB byte-programmable EPROM code
memory
Digital Peripherals
- Up to 8 Port I/O with high sink current capability
- Hardware enhanced UART and SMBus™ serial
ports
- Three general purpose 16-bit counter/timers
- 16-bit programmable counter array (PCA) with three
capture/compare modules
8 or 16-bit PWM
Rising / falling edge capture
Frequency output
Software timer
Clock Sources
- Internal oscillator: 24.5 MHz with ±2% accuracy
supports crystal-less UART operation
- External oscillator: RC, C, or CMOS Clock
- Can switch between clock sources on-the-fly; useful
in power saving modes
ANALOG
PERIPHERALS
A 10-bit
M
U
500ksps
X ADC
TEMP
SENSOR
+
C8051T600/2/4
-
VOLTAGE
COMPARATOR
DIGITAL I/O
UART
SMBus
PCA
Timer 0
Timer 1
Timer 2
CALIBRATED PRECISION INTERNAL
OSCILLATOR
HIGH-SPEED CONTROLLER CORE
1.5/2/4/8kB
EPROM
12
INTERRUPTS
8051 CPU
(25MIPS)
DEBUG
CIRCUITRY
128/256 B
SRAM
POR WDT
Rev. 1.2 3/09
Copyright © 2009 by Silicon Laboratories
C8051T600/1/2/3/4/5/6
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
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C8051T605 Datasheet, Funktion
C8051T600/1/2/3/4/5/6
List of Figures
1. System Overview
Figure 1.1. C8051T600/2/4 Block Diagram ............................................................. 14
Figure 1.2. C8051T601/3/5 Block Diagram ............................................................. 14
Figure 1.3. C8051T606 Block Diagram ................................................................... 15
2. Ordering Information
3. Pin Definitions
Figure 3.1. C8051T600/1/2/3/4/5-GM QFN11 Pinout Diagram (Top View) ............. 19
Figure 3.2. C8051T600/1/2/3/4/5-GS SOIC14 Pinout Diagram (Top View) ............ 19
Figure 3.3. C8051T606-GM QFN11 Pinout Diagram (Top View) ............................ 20
Figure 3.4. C8051T606-GT MSOP10 Pinout Diagram (Top View) .......................... 20
Figure 3.5. C8051T606-ZM QFN10 Pinout Diagram (Top View) ............................ 21
4. QFN-11 Package Specifications
Figure 4.1. QFN-11 Package Drawing .................................................................... 22
Figure 4.2. QFN-11 PCB Land Pattern .................................................................... 23
5. SOIC-14 Package Specifications
Figure 5.1. SOIC-14 Package Drawing ................................................................... 24
Figure 5.2. SOIC-14 Recommended PCB Land Pattern ......................................... 25
6. MSOP-10 Package Specifications
Figure 6.1. MSOP-10 Package Drawing ................................................................. 26
Figure 6.2. MSOP-10 PCB Land Pattern ................................................................. 27
7. QFN-10 Package Specifications
Figure 7.1. QFN-10 Package Drawing .................................................................... 28
Figure 7.2. QFN-10 PCB Land Pattern .................................................................... 29
8. Electrical Characteristics
Figure 8.1. C8051T600/1/2/3/4/5 Normal Mode Supply Current vs. Frequency
(MPCE = 1) ........................................................................................................ 38
Figure 8.2. C8051T606 Normal Mode Supply Current vs. Frequency (MPCE = 1) 38
Figure 8.3. C8051T600/1/2/3/4/5 Idle Mode Supply Current vs. Frequency
(MPCE = 1) ........................................................................................................ 39
Figure 8.4. C8051T606 Idle Mode Digital Current vs. Frequency (MPCE = 1) ....... 39
9. 10-Bit ADC (ADC0, C8051T600/2/4 only)
Figure 9.1. ADC0 Functional Block Diagram ........................................................... 40
Figure 9.2. 10-Bit ADC Track and Conversion Example Timing ............................. 42
Figure 9.3. ADC0 Equivalent Input Circuits ............................................................. 43
Figure 9.4. ADC Window Compare Example: Right-Justified Data ......................... 49
Figure 9.5. ADC Window Compare Example: Left-Justified Data ........................... 49
Figure 9.6. ADC0 Multiplexer Block Diagram .......................................................... 50
10. Temperature Sensor (C8051T600/2/4 only)
Figure 10.1. Temperature Sensor Transfer Function .............................................. 52
Figure 10.2. Temperature Sensor Error with 1-Point Calibration at 0 °C ................ 53
11. Voltage Reference Options
Figure 11.1. Voltage Reference Functional Block Diagram ..................................... 55
12. Voltage Regulator (REG0)
6
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Rev. 1.2

6 Page









C8051T605 pdf, datenblatt
C8051T600/1/2/3/4/5/6
SFR Definition 25.1. CKCON: Clock Control .............................................................. 146
SFR Definition 25.2. TCON: Timer Control ................................................................. 151
SFR Definition 25.3. TMOD: Timer Mode ................................................................... 152
SFR Definition 25.4. TL0: Timer 0 Low Byte ............................................................... 153
SFR Definition 25.5. TL1: Timer 1 Low Byte ............................................................... 153
SFR Definition 25.6. TH0: Timer 0 High Byte ............................................................. 154
SFR Definition 25.7. TH1: Timer 1 High Byte ............................................................. 154
SFR Definition 25.8. TMR2CN: Timer 2 Control ......................................................... 157
SFR Definition 25.9. TMR2RLL: Timer 2 Reload Register Low Byte .......................... 158
SFR Definition 25.10. TMR2RLH: Timer 2 Reload Register High Byte ...................... 158
SFR Definition 25.11. TMR2L: Timer 2 Low Byte ....................................................... 158
SFR Definition 25.12. TMR2H Timer 2 High Byte ....................................................... 159
SFR Definition 26.1. PCA0CN: PCA Control .............................................................. 173
SFR Definition 26.2. PCA0MD: PCA Mode ................................................................ 174
SFR Definition 26.3. PCA0CPMn: PCA Capture/Compare Mode .............................. 175
SFR Definition 26.4. PCA0L: PCA Counter/Timer Low Byte ...................................... 176
SFR Definition 26.5. PCA0H: PCA Counter/Timer High Byte ..................................... 176
SFR Definition 26.6. PCA0CPLn: PCA Capture Module Low Byte ............................. 177
SFR Definition 26.7. PCA0CPHn: PCA Capture Module High Byte ........................... 177
C2 Register Definition 27.1. C2ADD: C2 Address ...................................................... 178
C2 Register Definition 27.2. DEVICEID: C2 Device ID ............................................... 179
C2 Register Definition 27.3. REVID: C2 Revision ID .................................................. 179
C2 Register Definition 27.4. DEVCTL: C2 Device Control .......................................... 180
C2 Register Definition 27.5. EPCTL: EPROM Programming Control Register ........... 180
C2 Register Definition 27.6. EPDAT: C2 EPROM Data .............................................. 181
C2 Register Definition 27.7. EPSTAT: C2 EPROM Status ......................................... 181
C2 Register Definition 27.8. EPADDRH: C2 EPROM Address High Byte .................. 182
C2 Register Definition 27.9. EPADDRL: C2 EPROM Address Low Byte ................... 182
C2 Register Definition 27.10. CRC0: CRC Byte 0 ...................................................... 183
C2 Register Definition 27.11. CRC1: CRC Byte 1 ...................................................... 183
C2 Register Definition 27.12. CRC2: CRC Byte 2 ...................................................... 184
C2 Register Definition 27.13. CRC3: CRC Byte 3 ...................................................... 184
12
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