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C8051F911 Schematic ( PDF Datasheet ) - Silicon Laboratories

Teilenummer C8051F911
Beschreibung (C8051F90X / C8051F91X) 12/10-Bit ADC MCU
Hersteller Silicon Laboratories
Logo Silicon Laboratories Logo 




Gesamt 70 Seiten
C8051F911 Datasheet, Funktion
C8051F91x-C8051F90x
Single/Dual Battery, 0.9–3.6 V, 16–8 kB, SmaRTClock, 12/10-Bit ADC MCU
Ultra-Low Power
- 160 uA/MHz in active mode (24.5 MHz clock)
- 2 us wake-up time (two-cell mode)
- 10 nA sleep mode with memory retention;
- 50 nA sleep mode with brownout detector
- 300 nA sleep mode with LFO (‘F912/02 only)
- 600 nA sleep mode with external crystal
Supply Voltage 0.9 to 3.6 V
- One-cell mode supports 0.9 to 1.8 V operation
(‘F911/01). ‘F912 and ‘F902 devices can operate
from 0.9 to 3.6 V continuously
- Two-cell mode supports 1.8 to 3.6 V operation
- Built-in dc-dc converter with 1.8 to 3.3 V output for
use in one-cell mode
- Built-in LDO regulator allows a high analog supply
voltage and low digital core voltage
- 2 built in supply monitors (brownout detectors)
12-Bit or 10-Bit Analog to Digital Converter
- ±1 LSB INL (10-bit mode); ±1.5 LSB INL (12-bit
mode, ‘F912/02 only) no missing codes
- Programmable throughput up to 300 ksps (10-Bit
Mode) or 75 ksps (12-bit mode, ‘F912/02 only)
- Up to 15 external inputs
- On-chip voltage reference
- On-Chip PGA allows measuring voltages up to twice
the reference voltage
- 16-bit auto-averaging accumulator with burst mode
provides increased ADC resolution
- Data dependent windowed interrupt generator
- Built-in temperature sensor
Two Comparators
- Programmable hysteresis and response time
- Configurable as wake-up or reset source
- Up to 15 Capacitive Touch Sense Inputs
6-Bit Programmable Current Reference
- Up to ±500 µA. Can be used as a bias or for
generating a custom reference voltage
- PWM enhanced mode on ‘F912/02 devices
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- Expanded interrupt handler
Memory
- 768 bytes RAM
- 16 kB (‘F912/1), or 8 kB (‘F902/1) Flash; In-system
programmable
Digital Peripherals
- 16 port I/O; All 5 V tolerant with high sink
current and programmable drive strength
- Hardware SMBus™ (I2C™ Compatible), 2 x SPI™,
and UART serial ports available concurrently
- Four general purpose 16-bit counter/timers
- Programmable 16-bit counter/timer array with six
capture/compare modules and watchdog timer
Clock Sources
- Internal oscillators: 24.5 MHz, 2% accuracy
supports UART operation; 20 MHz low power
oscillator requires very little bias current.
- External oscillator: Crystal, RC, C, or CMOS clock
- SmaRTClock oscillator: 32 kHz crystal or internal
low frequency oscillator (‘F912/02) or self-oscillate
mode
- Can switch between clock sources on-the-fly; useful
in implementing various power saving modes
On-Chip Debug
- On-chip debug circuitry facilitates full-speed, non-
intrusive in-system debug (no emulator required)
- Provides 4 breakpoints, single stepping
- Inspect/modify memory and registers
- Complete development kit
Packages
- 24-pin QFN (4 x 4 mm)
- 24-pin QSOP (easy to hand-solder)
- Tested die available
Temperature Range: –40 to +85 °C
ANALOG
DIGITAL I/O
PERIPHERALS
A 12/10-bit
M 75/300 ksps IREF
U
X
ADC
TEMP
SENSOR
VREF
VREG
++
––
VOLTAGE
COMPARATORS
UART
SMBus
2 x SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
CRC
Port 0
Port 1
Port 2
24.5 MHz PRECISION
INTERNAL OSCILLATOR
20 MHz LOW POWER
INTERNAL OSCILLATOR
External Oscillator
HARDWARE SmaRTClock
HIGH-SPEED CONTROLLER CORE
16/8 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
768 B SRAM
POR WDT
Rev. 1.0 9/10
Copyright © 2010 by Silicon Laboratories
C8051F91x-C8051F90x
www.DataSheet.in






C8051F911 Datasheet, Funktion
C8051F91x-C8051F90x
19.2.Low Power Internal Oscillator......................................................................... 180
19.3.External Oscillator Drive Circuit...................................................................... 180
19.3.1.External Crystal Mode............................................................................ 180
19.3.2.External RC Mode.................................................................................. 182
19.3.3.External Capacitor Mode........................................................................ 183
19.3.4.External CMOS Clock Mode .................................................................. 184
19.4.Special Function Registers for Selecting and Configuring the System Clock 185
20. SmaRTClock (Real Time Clock) .......................................................................... 188
20.1.SmaRTClock Interface ................................................................................... 189
20.1.1.SmaRTClock Lock and Key Functions................................................... 189
20.1.2.Using RTC0ADR and RTC0DAT to Access SmaRTClock
Internal Registers ................................................................................... 190
20.1.3.RTC0ADR Short Strobe Feature............................................................ 190
20.1.4.SmaRTClock Interface Autoread Feature .............................................. 190
20.1.5.RTC0ADR Autoincrement Feature......................................................... 191
20.2.SmaRTClock Clocking Sources ..................................................................... 194
20.2.1.Using the SmaRTClock Oscillator with a Crystal or
External CMOS Clock ............................................................................ 194
20.2.2.Using the SmaRTClock Oscillator in Self-Oscillate Mode...................... 195
20.2.3.Using the Low Frequency Oscillator (LFO) ............................................ 195
20.2.4.Programmable Load Capacitance.......................................................... 196
20.2.5.Automatic Gain Control (Crystal Mode Only) and
SmaRTClock Bias Doubling ................................................................... 197
20.2.6.Missing SmaRTClock Detector .............................................................. 199
20.2.7.SmaRTClock Oscillator Crystal Valid Detector ...................................... 199
20.3.SmaRTClock Timer and Alarm Function ........................................................ 199
20.3.1.Setting and Reading the SmaRTClock Timer Value .............................. 199
20.3.2.Setting a SmaRTClock Alarm ................................................................ 200
20.3.3.Software Considerations for using the SmaRTClock Timer and Alarm . 200
21. Port Input/Output.................................................................................................. 205
21.1.Port I/O Modes of Operation........................................................................... 206
21.1.1.Port Pins Configured for Analog I/O....................................................... 206
21.1.2.Port Pins Configured For Digital I/O....................................................... 206
21.1.3.Interfacing Port I/O to 5 V and 3.3 V Logic............................................. 207
21.1.4.Increasing Port I/O Drive Strength ......................................................... 207
21.2.Assigning Port I/O Pins to Analog and Digital Functions................................ 207
21.2.1.Assigning Port I/O Pins to Analog Functions ......................................... 207
21.2.2.Assigning Port I/O Pins to Digital Functions........................................... 208
21.2.3.Assigning Port I/O Pins to External Digital Event Capture Functions .... 208
21.3.Priority Crossbar Decoder .............................................................................. 209
21.4.Port Match ...................................................................................................... 215
21.5.Special Function Registers for Accessing and Configuring Port I/O .............. 217
22. SMBus ................................................................................................................... 225
22.1.Supporting Documents ................................................................................... 226
22.2.SMBus Configuration...................................................................................... 226
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C8051F911 pdf, datenblatt
C8051F91x-C8051F90x
List of Tables
2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 2.1. Product Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 3.1. Pin Definitions for the C8051F91x-C8051F90x . . . . . . . . . . . . . . . . . . . 27
Table 3.2. QFN-24 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 3.3. PCB Land Pattern ................................................................................... 33
Table 3.4. QSOP-24 Package Dimensions ............................................................. 34
Table 3.5. PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 4.1. Absolute Maximum Ratings .................................................................... 36
Table 4.2. Global Electrical Characteristics ............................................................. 37
Table 4.3. Port I/O DC Electrical Characteristics ..................................................... 47
Table 4.4. Reset Electrical Characteristics .............................................................. 52
Table 4.5. Power Management Electrical Specifications ......................................... 53
Table 4.6. Flash Electrical Characteristics .............................................................. 53
Table 4.7. Internal Precision Oscillator Electrical Characteristics ........................... 53
Table 4.8. Internal Low-Power Oscillator Electrical Characteristics ........................ 53
Table 4.9. SmaRTClock Characteristics .................................................................. 54
Table 4.10. ADC0 Electrical Characteristics ............................................................ 54
Table 4.11. Temperature Sensor Electrical Characteristics .................................... 55
Table 4.12. Voltage Reference Electrical Characteristics ....................................... 56
Table 4.13. IREF0 Electrical Characteristics ........................................................... 57
Table 4.14. Comparator Electrical Characteristics .................................................. 58
Table 4.15. VREG0 Electrical Characteristics ......................................................... 59
Table 4.16. DC-DC Converter (DC0) Electrical Characteristics .............................. 60
Table 5.1. Representative Conversion Times and Energy Consumption for the SAR
ADC with 1.65 V High-Speed VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 8.1. CIP-51 Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Table 11.1. Special Function Register (SFR) Memory Map (Page 0x0) . . . . . . . . 113
Table 11.2. Special Function Register (SFR) Memory Map (Page 0xF) . . . . . . . . 114
Table 11.3. Special Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Table 12.1. Interrupt Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Table 13.1. Flash Security Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Table 14.1. Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Table 15.1. Example 16-bit CRC Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Table 16.1. IPeak Inductor Current Limit Settings . . . . . . . . . . . . . . . . . . . . . . . . . 161
Table 19.1. Recommended XFCN Settings for Crystal Mode . . . . . . . . . . . . . . . . 181
Table 19.2. Recommended XFCN Settings for RC and C modes . . . . . . . . . . . . . 182
Table 20.1. SmaRTClock Internal Registers ......................................................... 189
Table 20.2. SmaRTClock Load Capacitance Settings . . . . . . . . . . . . . . . . . . . . . 196
Table 20.3. SmaRTClock Bias Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
Table 21.1. Port I/O Assignment for Analog Functions . . . . . . . . . . . . . . . . . . . . . 207
Table 21.2. Port I/O Assignment for Digital Functions . . . . . . . . . . . . . . . . . . . . . . 208
Table 21.3. Port I/O Assignment for External Digital Event Capture Functions . . 208
Table 22.1. SMBus Clock Source Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
12
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