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Número de pieza | ADC128S102QML | |
Descripción | 12-Bit A/D Converter | |
Fabricantes | National Semiconductor | |
Logotipo | ||
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No Preview Available ! ADC128S102QML
May 17, 2010
8-Channel, 50 kSPS to 1 MSPS, 12-Bit A/D Converter
General Description
The ADC128S102 is a low-power, eight-channel CMOS 12-
bit analog-to-digital converter specified for conversion
throughput rates of 50 kSPS to 1 MSPS. The converter is
based on a successive-approximation register architecture
with an internal track-and-hold circuit. It can be configured to
accept up to eight input signals at inputs IN0 through IN7.
The output serial data is straight binary and is compatible with
several standards, such as SPI™, QSPI™, MICROWIRE™,
and many common DSP serial interfaces.
The ADC128S102 may be operated with independent analog
and digital supplies. The analog supply (VA) can range from
+2.7V to +5.25V, and the digital supply (VD) can range from
+2.7V to VA. Normal power consumption using a +3V or +5V
supply is 2.3 mW and 10.7 mW, respectively. The power-
down feature reduces the power consumption to 0.06 µW
using a +3V supply and 0.25 µW using a +5V supply.
Features
■ Total Ionizing Dose
100 krad(Si)
■ Single Event Latch-up
120 MeV-cm2/mg
■ Eight input channels
■ Variable power management
■ Independent analog and digital supplies
■ SPI/QSPI/MICROWIRE/DSP compatible
■ Packaged in 16-lead Ceramic SOIC
Key Specifications
■ Conversion Rate
■ DNL (VA = VD = 5.0 V)
■ INL (VA = VD = 5.0 V)
■ Power Consumption
— 3V Supply
— 5V Supply
50 kSPS to 1 MSPS
+1.5 / −0.9 LSB (max)
+1.4 / −1.25 LSB (max)
2.3 mW (typ)
10.7 mW (typ)
Applications
■ Automotive Navigation
■ Portable Systems
■ Medical Instruments
■ Mobile Communications
■ Instrumentation and Control Systems
Ordering Information
NS Part Number
ADC128S102WGRQV
Flight Part
ADC128S102WGMPR
Pre-Flight Prototype
ADC128S102CVAL
Ceramic Evaluation Board
SMD Part Number
5962R0722701VZA
100 krad(Si)
Connection Diagram
NS Package Number
WG16A
WG16A
Package Description
16LD Ceramic SOIC
16LD Ceramic SOIC
16LD Ceramic SOIC
on Evaluation Board
SPI™ is a trademark of Motorola, Inc.
© 2010 National Semiconductor Corporation
300181
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30018105
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1 page Symbol
Parameter
Conditions
Intermodulation Distortion,
Second Order Terms
IMD
Intermodulation Distortion,
Third Order Terms
ANALOG INPUT CHARACTERISTICS
VIN Input Range
IDCL DC Leakage Current
VA = VD = +3.0V,
fa = 19.5 kHz, fb = 20.5 kHz
VA = VD = +5.0V,
fa = 19.5 kHz, fb = 20.5 kHz
VA = VD = +3.0V,
fa = 19.5 kHz, fb = 20.5 kHz
VA = VD = +5.0V,
fa = 19.5 kHz, fb = 20.5 kHz
CINA
Input Capacitance
Track Mode
Hold Mode
DIGITAL INPUT CHARACTERISTICS
VIH Input High Voltage
VIL Input Low Voltage
IIN Input Current
VA = VD = +2.7V to +3.6V
VA = VD = +4.75V to +5.25V
VA = VD = +2.7V to +5.25V
VIN = 0V or VD
CIND
Digital Input Capacitance
DIGITAL OUTPUT CHARACTERISTICS
VOH Output High Voltage
VOL Output Low Voltage
IOZH, IOZL
Hi-Impedance Output
Leakage Current
ISOURCE = 200 µA,
VA = VD = +2.7V to +5.25V
ISINK = 200 µA to 1.0 mA,
VA = VD = +2.7V to +5.25V
VA = VD = +2.7V to +5.25V
COUT
Hi-Impedance Output
Capacitance
Output Coding
Notes
Typical
(Note 6)
−93
Min
Max Units Sub-
groups
−78 dB 4, 5, 6
−93 −78 dB 4, 5, 6
−91 −70 dB 4, 5, 6
−91 −70 dB 4, 5, 6
(Note
7)
(Note
7)
0 to VA
±0.01
38
4.5
2.1
2.4
(Note
7)
±1.0
3.5
V
±1.0 µA 1, 2, 3
pF
pF
0.8
±1.0
V
V
V
µA
pF
(max)
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
VD −0.5
0.4
V 1, 2, 3
V 1, 2, 3
±0.01
±1.0 µA
(Note
7)
3.5
pF
(max)
Straight (Natural) Binary
1, 2, 3
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5 Page Typical Performance Characteristics TA = +25°C, fSAMPLE = 1 MSPS, fSCLK = 16 MHz, fIN = 40.2 kHz
unless otherwise stated.
DNL
DNL
INL
30018140
INL
30018141
DNL vs. Supply
30018142
INL vs. Supply
30018143
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11
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11 Page |
Páginas | Total 22 Páginas | |
PDF Descargar | [ Datasheet ADC128S102QML.PDF ] |
Número de pieza | Descripción | Fabricantes |
ADC128S102QML | 12-Bit A/D Converter | National Semiconductor |
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