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PDF NTMFS4821N Data sheet ( Hoja de datos )
| Número de pieza | NTMFS4821N | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTMFS4821N
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Power MOSFET
30 V, 58.5 A, Single N−Channel, SO−8 FL
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• Thermally Enhanced SO−8 Package
• These are Pb−Free Device
Applications
• Refer to Application Note AND8195/D
• CPU Power Delivery
• DC−DC Converters
• High Side Switching
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
C(Nuortreen1t)RqJA
TA = 25°C
TA = 85°C
VDSS
VGS
ID
30
±20
13.8
10
V
V
A
Power Dissipation
RqJA (Note 1)
Continuous Drain
Current
10 sec
RqJA
v
Power Dissipation
RqJA, t v 10 sec
Continuous Drain
Current RqJA
(Note 2)
TA = 25°C
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 85°C
PD
ID
PD
ID
2.14 W
22.4 A
16.1
5.61 W
8.8 A
6.4
Power Dissipation
RqJA (Note 2)
Continuous Drain
C(Nuortreen1t)RqJC
TA = 25°C
TC = 25°C
TC = 85°C
PD
ID
0.87 W
58.5 A
42.3
Power Dissipation
RqJC (Note 1)
Pulsed Drain
Current
TC = 25°C
tp=10ms TA = 25°C
PD
IDM
38.5 W
117 A
Current limited by package
TA = 25°C
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
IDmaxpkg
TJ,
TSTG
IS
dV/dt
100
−55 to
+150
38.5
6
A
°C
A
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 50 V, VGS = 10 V,
IL = 24 Apk, L = 0.3 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
EAS
TL
86 mJ
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
V(BR)DSS
30 V
RDS(ON) MAX
6.95 mW @ 10 V
10.8 mW @ 4.5 V
ID MAX
58.5 A
D (5,6)
G (4)
S (1,2,3)
N−CHANNEL MOSFET
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
MARKING
DIAGRAM
D
S
S
S
4821N
AYWWG
D
GGD
D
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NTMFS4821NT1G
Package
SO−8FL
(Pb−Free)
Shipping†
1500 /
Tape & Reel
NTMFS4821NT3G SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2010
January, 2010 − Rev. 3
1
Publication Order Number:
NTMFS4821N/D
1 page  
NTMFS4821N
2000
1800
1600
1400
1200
TJ = 25°C
Ciss
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12
QT
10
8
1000
6
800
600
400 Coss
200 Crss
4 Qgs
2
Qgd
VGS
ID = 30 A
TJ = 25°C
00
0 5 10 15 20 25 30 0 4 8 12 16 20 24
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
100
VDD = 15 V
ID = 30 A
VGS = 11.5 V
10
td(off)
tf
tr
td(on)
30
VGS = 0 V
25 TJ = 25°C
20
15
10
5
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
100
VGS = 20 V
Single Pulse
TC = 25°C
10 ms
100 ms
10
1 ms
1
0.1
0.1
RDS(on) Limit
Thermal Limit
Package Limit
1
10 ms
dc
10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
100
90 ID = 24 A
80
70
60
50
40
30
20
10
0
25 50 75 100 125 150
TJ, STARTING JUNCTION TEMPERATURE(°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
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| PDF Descargar | [ Datasheet NTMFS4821N.PDF ] | |
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