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PDF RM3283 Data sheet ( Hoja de datos )
| Número de pieza | RM3283 | |
| Descripción | Dual ARINC 429 Line Receiver | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de RM3283 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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RM3283
Dual ARINC 429 Line Receiver
www.DataSheet4U.com
www.fairchildsemi.com
Features
• Two separate analog receiver channels
• Converts ARINC 429 levels to serial data
• Built-in TTL compatible complete channel test inputs
• TTL and CMOS compatible outputs
• Low power dissipation
• Internal bandgap
• Short circuit protected
• Available in 20-Lead ceramic DIP
Description
The RM3283 consists of two analog ARINC 429 receivers
which take differentially encoded ARINC level data and
convert it to serial TTL level data. The RM3283 provides
two complete analog ARINC receivers and no external
components are required.
Input level shifting thin film resistors and bipolar technology
allow ARINC input voltage transients up to ±100V without
damage to the RM3283.
Each channel is identical, featuring symmetrical propagation
delays for better high speed performance. Input common
mode rejection is excellent and threshold voltage is stable,
independent of supply voltage. Data outputs are TTL and
CMOS compatible.
Two TTL compatible test inputs used to test the ARINC
channels are available. They can be used to override the
ARINC input data and set the channel outputs to a known
state.
The Fairchild RM3182A line driver is the companion chip to
the RM3283 line receiver. Together they provide the analog
functions needed for the ARINC 429 interface. Digital data
processing involving serial-to-parallel conversion and clock
recovery can be accomplished using one of the ARINC
interface IC’s available or by an equivalent gate array
implementation.
Block Diagram
+VS
In 1A
In 1B
RM3283
18
11
16
Cap 1A
Cap 1B
19
17
Test A
Test B
2
20
Cap 2A
Cap 2B
In 2A
In 2B
7
3
6
4
Channel
Test
Circuitry
1
-VS
Bit
Detection
and Level
Shifting
Hysteresis
Bandgap Voltage
Reference
Threshold
Generator
Bit Detection
and Level
Shifting
Hysteresis
+VL
9
Output
Driver
Output
Driver
14
Gnd
15 Out 1A
12 Out 1B
8 Out 2A
5
Out 2B
65-3283-01
REV. 1.0.1 12/7/00
1 page  
PRODUCT SPECIFICATION
AC Test Waveforms
+10V
ARINC In
(Differential) 0V
Logic Out
(A Output)
T PLH
T PHL
65-3283-10
Figure 7. Propagation Delay
www.DataSRhMee3t42U8.3com
Logic
Out
90%
10%
90%
10%
TR TF
65-3283-11
Figure 8. Rise/Fall Times
Test Circuit
+15V
-15V
+5V
In1 A
In2 A
VREF
0.1 µF
0.01 µF
0.01µF
11
18
6
16
4
19
1
RM3283
17 7 3
9 15
50 pF
12
50 pF
8
50 pF
5
14
50 pF
39pF 39pF 39pF 39pF
Out 1A
Out 1B
Out 2A
Out 2B
Notes:
1. VIN = 400 kHz square wave, -3.5V to +3.5V.
2. Set VREF = +3.5 V to test VOUT1 and VOUT3.
Set VREF = -3.5 V to test VOUT2 and VOUT4.
3. 50 pF load capacitance includes probe and wiring capacitance.
Figure 9. AC Test Schematic Diagram
65-3283-12
REV. 1.0.1 12/7/00
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet RM3283.PDF ] | |
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