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CAT9532 Schematic ( PDF Datasheet ) - ON Semiconductor

Teilenummer CAT9532
Beschreibung 16-bit Programmable LED Dimmer
Hersteller ON Semiconductor
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Gesamt 14 Seiten
CAT9532 Datasheet, Funktion
CAT9532
16-bit Programmable LED
Dimmer with I2C Interface
Description
The CAT9532 is a CMOS device that provides 16−bit parallel
input/output port expander optimized for LED dimming control. The
CAT9532 outputs can drive directly 16 LEDs in parallel. Each
individual LED may be turned ON, OFF, or blinking at one of two
programmable rates. The device provides a simple solution for
dimming LEDs in 256 brightness steps for backlight and color mixing
applications. The CAT9532 is suitable in I2C and SMBus compatible
applications where it is necessary to limit the bus traffic or free−up the
bus master’s timer.
The CAT9532 contains an internal oscillator and two PWM signals
that drive the LED outputs. The user can program the period and duty
cycle for each individual PWM signal. After the initial set−up
command to program the Blink Rate 1 and Blink Rate 2 (frequency
and duty cycle), only one command from the bus master is required to
turn each individual open drain output ON, OFF, or cycle at Blink
Rate 1 or Blink Rate 2. Each open drain LED output can provide a
maximum output current of 25 mA. The total current sunk by all I/Os
must not exceed 400 mA.
Features
16 LED Drivers with Dimming Control
256 Brightness Steps
16 Open Drain Outputs Drive 25 mA Each
2 Selectable Programmable Blink Rates:
– Frequency: 0.593 Hz to 152 Hz
– Duty Cycle: 0% to 99.6%
I/Os can be Used as GPIOs
400 kHz I2C Bus Compatible
2.3 V to 5.5 V Operation
5 V Tolerant I/Os
Active Low Reset Input
24−Lead TSSOP and 24−pad TQFN (4 x 4 mm) Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
Backlighting
RGB Color Mixing
Sensors Control
Power Switches, Push−buttons
Alarm Systems
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TSSOP−24
Y SUFFIX
CASE 948AR
TQFN−24
HV6 SUFFIX
CASE 510AG
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
October, 2016 − Rev. 5
1
Publication Order Number:
CAT9532/D






CAT9532 Datasheet, Funktion
CAT9532
Pin Description
SCL: Serial Clock
The serial clock input clocks all data transferred into or out
of the device. The SCL line requires a pull−up resistor if it
is driven by an open drain output.
SDA: Serial Data/Address
The bidirectional serial data/address pin is used to transfer
all data into and out of the device. The SDA pin is an open
drain output and can be wire−ORed with other open drain or
open collector outputs. A pull−up resistor must be connected
from SDA line to VCC.
LED0 to LED15: LED Driver Outputs / General Purpose
I/Os
The pins are open drain outputs used to drive directly
LEDs. Any of these pins can be programmed to drive the
LED ON, OFF, Blink Rate1 or Blink Rate2. When not used
for controlling the LEDs, these pins may be used as general
purpose parallel input/output.
RESET: External Reset Input
Active low Reset input is used to initialize the CAT9532
internal registers and the I2C state machine. The internal
registers are held in their default state while Reset input is
active. An external pull−up resistor of maximum 25 kW is
required when this pin is not actively driven.
Functional Description
The CAT9532 is a 16−bit I/O bus expander that provides
a programmable LED dimmer, controlled through an I2C
compatible serial interface.
The CAT9532 supports the I2C Bus data transmission
protocol. This Inter−Integrated Circuit Bus protocol defines
any device that sends data to the bus to be a transmitter and
any device receiving data to be a receiver. The transfer is
controlled by the Master device which generates the serial
clock and all START and STOP conditions for bus access.
The CAT9532 operates as a Slave device. Both the Master
device and Slave device can operate as either transmitter or
receiver, but the Master device controls which mode is
activated.
I2C Bus Protocol
The features of the I2C bus protocol are defined as
follows:
1. Data transfer may be initiated only when the bus is
not busy.
2. During a data transfer, the data line must remain
stable whenever the clock line is high. Any
changes in the data line while the clock line is high
will be interpreted as a START or STOP condition
(Figure 5).
START and STOP Conditions
The START Condition precedes all commands to the
device, and is defined as a HIGH to LOW transition of SDA
when SCL is HIGH. The CAT9532 monitors the SDA and
SCL lines and will not respond until this condition is met.
A LOW to HIGH transition of SDA when SCL is HIGH
determines the STOP condition. All operations must end
with a STOP condition.
Device Addressing
After the bus Master sends a START condition, a slave
address byte is required to enable the CAT9532 for a read or
write operation. The four most significant bits of the slave
address are fixed as binary 1100 (Figure 6). The CAT9532
uses the next three bits as address bits.
The address bits A2, A1 and A0 are used to select which
device is accessed from maximum eight devices on the same
bus. These bits must compare to their hardwired input pins.
The 8th bit following the 7−bit slave address is the R/W bit
that specifies whether a read or write operation is to be
performed. When this bit is set to “1”, a read operation is
initiated, and when set to “0”, a write operation is selected.
Following the START condition and the slave address byte,
the CAT9532 monitors the bus and responds with an
acknowledge (on the SDA line) when its address matches the
transmitted slave address. The CAT9532 then performs a read
or a write operation depending on the state of the R/W bit.
SDA
SCL
START CONDITION
Figure 5. Start/Stop Timing
SLAVE ADDRESS
STOP CONDITION
1 1 0 0 A2 A1 A0 R/W
FIXED
PROGRAMMABLE
HARDWARE SELECTABLE
Figure 6. CAT9532 Slave Address
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CAT9532 pdf, datenblatt
CAT9532
PACKAGE DIMENSIONS
TSSOP24, 4.4x7.8
CASE 948AR
ISSUE A
b
e
TOP VIEW
D
A2
A1
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
E1 E
SYMBOL
A
A1
A2
b
c
D
E
E1
e
L
L1
θ
MIN
0.05
0.80
0.19
0.09
7.70
6.25
4.30
0.50
NOM
7.80
6.40
4.40
0.65 BSC
0.60
1.00 REF
MAX
1.20
0.15
1.05
0.30
0.20
7.90
6.55
4.50
0.70
A θ1
END VIEW
c
L
L1
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