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Teilenummer | CDB4353 |
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Beschreibung | 3.3 V Stereo Audio DAC | |
Hersteller | Cirrus Logic | |
Logo | ||
Gesamt 28 Seiten www.DataSheet4U.com
CS4353
3.3 V Stereo Audio DAC with 2 VRMS Line Output
Features
Multi-bit Delta-Sigma Modulator
106 dB A-wt Dynamic Range
-93 dB THD+N
Single-ended Ground Centered Analog
Architecture
– No DC-blocking Capacitors Required
– Integrated Step-up/Inverting Charge Pump
– Filtered Line-level Outputs
– Selectable 1 or 2 VRMS Full-scale Output
Low Clock-jitter Sensitivity
Low-latency Digital Filtering
Supports Sample Rates up to 192 kHz
24-bit Resolution
+3.3 V Charge Pump and Core Logic, +3.3 V
Analog, and +0.9 to 3.3 V Interface Power
Supplies
Low Power Consumption
24-pin QFN, Lead-free Assembly
Description
The CS4353 is a complete stereo digital-to-analog sys-
tem including digital interpolation, fifth-order multi-bit
delta-sigma digital-to-analog conversion, digital de-em-
phasis, analog filtering, and on-chip 2 VRMS line-level
driver from a 3.3 V supply.
The advantages of this architecture include ideal differ-
ential linearity, no distortion mechanisms due to resistor
matching errors, no linearity drift over time and temper-
ature, high tolerance to clock jitter, and a minimal set of
external components.
The CS4353 is available in a 24-pin QFN package in
both Automotive (-40°C to +105°C) and Commercial
(-40°C to +85°C) grades. The CDB4353 Customer
Demonstration Board is also available for device evalu-
ation and implementation suggestions. Please see
“Ordering Information” on page 26 for complete details.
These features are ideal for cost-sensitive, 2-channel
audio systems including video game consoles, DVD
players and recorders, A/V receivers, set-top boxes,
digital TVs, mini-component systems, and mixing
consoles.
Interface Supply (VL)
+0.9 V to +3.3 V
Digital Core Logic and
Charge Pump Supply (VCP)
+3.3 V
Analog Supply (VA)
+3.3 V
Reset
Hardware
Control
Serial
Audio
Input
Hardware
Control
PCM Serial
Audio Port
Auto Speed
Mode Detect
Power-On
Reset
Interpolation
Filters
Multibit
∆Σ Modulator
DAC
Step-Up
Inverting
+VA_H
-VA_H
Ground-Centered,
2 Vrms Line Level Outputs
Left Channel
Pseudo Diff. Input
Right Channel
Preliminary Product Information
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
DEC '08
DS803PP1
2. CHARACTERISTICS AND SPECIFICATIONS
CS4353www.DataSheet4U.com
RECOMMENDED OPERATING CONDITIONS
AGND = DNGD = CPGND = 0 V; all voltages with respect to ground.
Parameters
Symbol Min Typ Max Units
DC Power Supply
Charge Pump and Digital Core power (Note 1)
Low Voltage Analog power (Note 1)
Interface power
VCP
VA
VL
3.13 3.3 3.47
3.13 3.3 3.47
0.85 0.9 to 3.3 3.47
V
V
V
Ambient Operating Temperature (Power Applied)
-CNZ
-DNZ
TA
TA
-40 - +85 °C
-40 - +105 °C
Notes: 1. VCP and VA must be supplied with the same nominal voltage. Additional current draw will occur if the sup-
ply voltages applied to VCP and VA differ by more than 0.5 V.
ABSOLUTE MAXIMUM RATINGS
AGND = DNGD = CPGND = 0 V; all voltages with respect to ground.
Parameters
DC Power Supply
Charge Pump and Digital Core Logic Power
Low Voltage Analog Power
Supply Voltage Difference
Interface Power
Input Current, Any Pin Except Supplies
Digital Input Voltage
Digital Interface
Analog Input Voltage
AOUT_REF
Ambient Operating Temperature (Power Applied)
Storage Temperature
Symbol
VCP
VA
|VCP - VA|
VL
Iin
VIN-L
VIN-A
TA
Tstg
Min
-0.3
-0.3
-
-0.3
-
-0.3
-0.3
-55
-65
Max
3.63
3.63
0.5
3.63
±10
VL+ 0.4
0.5
+125
+150
Units
V
V
V
V
mA
V
V
°C
°C
WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation
is not guaranteed at these extremes.
6 DS803PP1
6 Page CS4353www.DataSheet4U.com
DC ELECTRICAL CHARACTERISTICS
Test conditions (unless otherwise specified): VCP = VA = VL = 3.3 V; AGND = DGND = CPGND = 0 V; SDIN = 0;
all voltages with respect to ground.
Parameters
Symbol Min Typ Max Units
Power Supplies
Power Supply Current (Note 13)
Normal Operation
Power-Down, All Supplies (Note 14)
Power Dissipation (All Supplies) Normal Operation, 1_2VRMS = 0
(Note 13)
Power-Down (Note 14)
IVCP
IVA
IVL
IPD
- 36 43 mA
- 2.4 3 mA
-
0.1 0.2
mA
- 65 -
µA
-
127 152
mW
- 1 - mW
Power Supply Rejection Ratio (Note 15)
(1 kHz) PSRR
-
60
-
(60 Hz)
- 60 -
dB
dB
DC Output Voltages
Pin Voltage
FLYP+ to FLYP-
VFILT+ to GND (Note 16)
FLYN+ to FLYN-
GND to VFILT- (Note 16)
VA to VBIAS
- 3.3 -
- 6.6 -
- 6.6 -
- 6.6 -
- 2.1 -
V
V
V
V
V
Notes: 13. Current consumption increases with increasing sample rate and increasing MCLK frequency. Typical
values are based on Fs = 48 kHz and MCLK = 12.288 MHz. Maximum values are based on highest
sample rate and highest MCLK frequency; see Switching Specifications - Serial Audio Interface. Vari-
ance between speed modes is small.
14. Power-down is defined as RESET pin = Low with all clock and data lines held static low. All digital inputs
have a weak pull-down (approximately 50 kΩ) which is only present during reset. Opposing this pull-
down will slightly increase the power-down current.
15. Valid with the recommended capacitor value on VBIAS as shown in the typical connection diagram in
Section 3.
16. Typical voltage shown for “Initialization State”, see Section 4.7. Typical voltage may be up to 1.5 V lower
during normal operation.
2.1 Digital I/O Pin Characteristics
Input and output levels and associated power supply voltage are shown in Table 2. Logic levels should not
exceed the corresponding power supply voltage.
Pin Name
RESET
MCLK
LRCK
SCLK
SDIN
DEM
I²S/LJ
1_2VRMS
Power Supply
VL
I/O
Input
Input
Input
Input
Input
Input
Input
Input
Driver
-
-
-
-
-
-
-
-
Receiver
0.9 V - 3.3 V, with Hysteresis
0.9 V - 3.3 V
0.9 V - 3.3 V
0.9 V - 3.3 V
0.9 V - 3.3 V
0.9 V - 3.3 V
0.9 V - 3.3 V
0.9 V - 3.3 V
Table 2. Digital I/O Pin Characteristics
12 DS803PP1
12 Page | ||
Seiten | Gesamt 28 Seiten | |
PDF Download | [ CDB4353 Schematic.PDF ] |
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