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Número de pieza | ADP3208D | |
Descripción | Synchronous Buck Controller | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de ADP3208D (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! ADP3208D
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7-Bit, Programmable,
Dual-Phase, Mobile, CPU,
Synchronous Buck
Controller
The ADP3208D is a highly efficient, multiphase, synchronous buck
switching regulator controller. With its integrated drivers, the
ADP3208D is optimized for converting the notebook battery voltage
into the core supply voltage required by high performance Intel
processors. An internal 7−bit DAC is used to read a VID code directly
from the processor and to set the CPU core voltage to a value within
the range of 0.3 V to 1.5 V. The phase relationship of the output signals
ensures interleaved 2−phase operation.
The ADP3208D uses a multi−mode architecture run at a
programmable switching frequency and optimized for efficiency
depending on the output current requirement. The ADP3208D
switches between single− and dual−phase operation to maximize
efficiency with all load conditions. The chip includes a programmable
load line slope function to adjust the output voltage as a function of the
load current so that the core voltage is always optimally positioned for
a load transient. The ADP3208D also provides accurate and reliable
short−circuit protection, adjustable current limiting, and a delayed
power−good output. The IC supports On−The−Fly (OTF) output
voltage changes requested by the CPU.
The ADP3208D is specified over the extended commercial
temperature range of −10°C to 100°C and is available in a 48−lead
LFCSP.
Features
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LFCSP48
CASE 932AD
MARKING DIAGRAM
ADP3208D
AWLYYWWG
A = Assembly Location
WL = Wafer Lot
YYWW = Date Code
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 36 of this data sheet.
• Single−Chip Solution
• Fully Compatible with the Intel® IMVP−6+t
Specifications
• Integrated MOSFET Drivers
• Input Voltage Range of 3.3 V to 22 V
• Selectable 1− or 2−Phase Operation with Up to 1 MHz
per Phase Switching Frequency
• Guaranteed ±8 mV Worst−Case Differentially Sensed
Core Voltage Error Overtemperature
• Automatic Power−Saving Mode Maximizes Efficiency
with Light Load During Deeper Sleep Operation
• Soft Transient Control Reduces Inrush Current and
Audio Noise
• Active Current Balancing Between Output Phases
• Independent Current Limit and Load Line Setting
Inputs for Additional Design Flexibility
• Built−In Power−Good Blanking Supports Voltage
Identification (VID) OTF Transients
• 7−Bit, Digitally Programmable DAC with 0.3 V to
1.5 V Output
• Short−Circuit Protection with Latchoff Delay
• Clock Enable Output Delays the CPU Clock Until the
Core Voltage is Stable
• Output Load Current Monitor
• This is a Pb−Free Device
Applications
• Notebook Power Supplies for Next Generation
Intel® Processors
© Semiconductor Components Industries, LLC, 2010
February, 2010 − Rev. 0
1
Publication Order Number:
ADP3208D/D
1 page Pin No
31
32
33
34
35
36
37
38
39 to
45
46
47
48
Mnemonic
PGND1
DRVL1
PVCC1
SW1
DRVH1
BST1
VCC
SP
VID6 to
VID0
PSI
DPRSTP
DPRSLP
ADP3208D
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Low−Side Driver Power Ground for Phase 1.
Description
Low−Side Gate Drive Output for Phase 1.
Power Supply Input/Output of Low−Side Gate Driver for Phase 1.
Current Balance Input for Phase 1 and Current Return For High−Side Gate Drive.
High−Side Gate Drive Output for Phase 1.
High−Side Bootstrap Supply for Phase 1. A capacitor from this pin to SW1 holds the bootstrapped voltage
while the high−side MOSFET is on.
Power Supply Input/Output of the Controller.
Single−Phase Select Input. Logic high state sets single−phase configuration.
Voltage Identification DAC Inputs. A 7−bit word (the VID code) programs the DAC output voltage, the
reference voltage of the voltage error amplifier without a load (see the VID code Table 3).
Power State Indicator Input. Driving this pin low forces the controller to operate in single−phase mode.
Deeper Stop Control Input. The logic state of this pin is usually complementary to the state of the DPRSLP
pin; however, during slow deeper sleep exit, both pins are logic low.
Deeper Sleep Control Input.
EN
PWRGD
NC
CLKEN
FBRTN
FB
COMP
NC
IRPM/NC
VARFREQ
VRTT
TTSNS
1
ADP3208D
BST1
DRVH1
SW1
PVCC1
DRVL1
PGND1
PGND2
DRVL2
PVCC2
SW2
DRVH2
BST2
Figure 5. Pin Configuration
(Top View)
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5
5 Page ADP3208D
TYPICAL PERFORMANCE CHARACTERISTICS
VVID = 1.5 V, TA = 20°C to 100°C, unless otherwise noted.
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95
90
85
80
75
70
65
60
55
50
0
VIN = 9.0 V
VIN = 9.0 V
VOUT = 1.2 V
fSW = 305 kHz
5 10 15 20 25 30 35 40 45
LOAD CURRENT (A)
Figure 7. PWM Mode Efficiency vs. Load Current
SW2
SW1
OUTPUT VOLTAGE
Input = 12 V, Output = 1.0 V
44 A to 9 A Load Step
Figure 8. Load Transient with 2−Phases
SW2
OUTPUT RIPPLE
SW1
OUTPUT VOLTAGE
Input = 12 V, Output = 1.0 V
9 A to 44 A Load Step
Figure 9. Load Transient with 2 Phases
CSREF to CSCOMP
SW1
SW2
Input = 12 V, Output = 1.1 V
No Load
Figure 10. Switching Waveforms in 2 Phase
OUTPUT RIPPLE
COMP
SW1
SW2
Input = 12 V, Output = 1.1 V
No Load
Figure 11. Switching Waveforms in 2−Phase
400
350
VARFREQ = 0 V
300
250
VARFREQ = 5.0 V
200
150
100
50
0
0.25
RT = 187 kΩ
2−Phase Mode
0.5 0.75 1 1.25
VID OUTPUT VOLTAGE (V)
1.5
Figure 12. Switching Frequency vs. VID Output
Voltage in PWM Mode
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11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet ADP3208D.PDF ] |
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