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ADP1883 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADP1883
Beschreibung Synchronous Current-Mode
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
ADP1883 Datasheet, Funktion
Synchronous Current-Mode withwww.DataSheet4U.com
Constant On-Time, PWM Buck Controller
ADP1882/ADP1883
FEATURES
Power input voltage as low as 2.75 V to 20 V
Bias supply voltage range: 2.75 V to 5.5 V
Minimum output voltage: 0.8 V
0.8 V reference voltage with ±1.0% accuracy
Supports all N-channel MOSFET power stages
Available in 300 kHz, 600 kHz, and 1.0 MHz options
No current-sense resistor required
Power saving mode (PSM) for light loads (ADP1883 only)
Resistor-programmable current-sense gain
Thermal overload protection
Short-circuit protection
Precision enable input
Integrated bootstrap diode for high-side drive
140 μA shutdown supply current
Starts into a precharged load
Small, 10-lead MSOP package
APPLICATIONS
Telecom and networking systems
Mid to high end servers
Set-top boxes
DSP core power supplies
GENERAL DESCRIPTION
The ADP1882/ADP1883 are versatile current-mode, synchronous
step-down controllers that provide superior transient response,
optimal stability, and current-limit protection by using a constant
on-time, pseudo-fixed frequency with a programmable current-
limit, current-control scheme. In addition, these devices offer
optimum performance at low duty cycles by using valley current-
mode control architecture. This allows the ADP1882/ADP1883
to drive all N-channel power stages to regulate output voltages
as low as 0.8 V.
The ADP1883 is the power saving mode (PSM) version of the
device and is capable of pulse skipping to maintain output
regulation while achieving improved system efficiency at light
loads (see the Power Saving Mode (PSM) Version (ADP1883)
section for more information).
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
TYPICAL APPLICATIONS CIRCUIT
VIN = 2.75V TO 20V
CC
VOUT RTOP
RC
CC2
RBOT
CVDD2
VDD = 2.75V TO 5.5V
CVDD
VIN
ADP1882/
ADP1883
COMP/EN BST
FB DRVH
GND
SW
VDD DRVL
PGND
CIN
CBST
Q1 L
VOUT
COUT
Q2
RRES
LOAD
Figure 1.
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
100
VDD = 5.5V, VIN = 13.0V
VDD = 5.5V, VIN = 16.5V
VDD = 5.5V, VIN = 5.5V (PSM)
VDD = 5.5V, VIN = 5.5V
VDD = 3.6V, VIN = 5.5V
TA = 25°C
VOUT = 1.8V
fSW = 300kHz
WURTH INDUCTOR:
744325120, L = 1.2µH, DCR = 1.8m
INFINEON MOSFETs:
BSC042N03MS G (UPPER/LOWER)
1k 10k
LOAD CURRENT (mA)
100k
Figure 2. ADP1882/ADP1883 Efficiency vs. Load Current
(VOUT = 1.8 V, 300 kHz)
Available in three frequency options (300 kHz, 600 kHz, and
1.0 MHz, plus the PSM option), the ADP1882/ADP1883 are
well suited for a wide range of applications. These ICs not only
operate from a 2.75 V to 5.5 V bias supply, but they also can
accept a power input as high as 20 V.
In addition, an internally fixed soft start period is included to limit
input in-rush current from the input supply during startup and
to provide reverse current protection during soft start for a pre-
charged output. The low-side current-sense, current-gain scheme
and integration of a boost diode, along with the PSM/forced
pulse-width modulation (PWM) option, reduce the external
part count and improve efficiency.
The ADP1882/ADP1883 operate over the −40°C to +125°C
junction temperature range and are available in a 10-lead MSOP.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.






ADP1883 Datasheet, Funktion
ADP1882/ADP1883
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
www.DataSheet4U.com
VIN 1
COMP/EN 2
FB 3
GND 4
VDD 5
ADP1882/
ADP1883
TOP VIEW
(Not to Scale)
10 BST
9 SW
8 DRVH
7 PGND
6 DRVL
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 VIN High Input Voltage. Connect VIN to the drain of the upper-side MOSFET.
2 COMP/EN Output of the Internal Error Amplifier/IC Enable. When this pin functions as EN, applying 0 V to this pin disables the IC.
3 FB Noninverting Input of the Internal Error Amplifier. This is the node where the feedback resistor is connected.
4
GND
Analog Ground Reference Pin of the IC. All sensitive analog components should be connected to this ground
plane (see the Layout Considerations section).
5 VDD Bias Voltage Supply for the ADP1882/ADP1883 Controller, Including the Output Gate Drivers. A bypass capacitor
of 1 μF directly from this pin to PGND and a 0.1 μF across VDD and GND are recommended.
6
DRVL
Drive Output for the External Lower-Side N-Channel MOSFET. This pin also serves as the current-sense gain
setting pin (see Figure 69).
7
PGND
Power GND. Ground for the lower-side gate driver and lower-side N-channel MOSFET.
8
DRVH
Drive Output for the External Upper-Side, N-Channel MOSFET.
9 SW Switch Node Connection.
10 BST Bootstrap for the Upper-Side MOSFET Gate Drive Circuitry. An internal boot rectifier (diode) is connected
between VDD and BST. A capacitor from BST to SW is required. An external Schottky diode can also be
connected between VDD and BST for increased gate drive capability.
Rev. 0 | Page 6 of 40

6 Page









ADP1883 pdf, datenblatt
ADP1882/ADP1883
1350
1300
1250
1200
1150
1100
1050
1000
950
900
0
VIN = 13V
+125°C
+25°C
–40°C
VIN = 16.5V
+125°C
+25°C
–40°C
0.8k 1.6k 2.4k 3.2k 4.0k 4.8k 5.6k 6.4k 7.2k 8.0k
LOAD CURRENT (mA)
Figure 34. Frequency vs. Load Current, 1.0 MHz, VOUT = 4 V
2.658
2.657
2.656
2.655
2.654
2.653
2.652
2.651
2.650
2.649
–40 –20
0
20 40 60 80
TEMPERATURE (°C)
Figure 35. UVLO vs. Temperature
100 120
100
VDD = 2.7V
+125°C
95
90
VDD = 3.6V
VDD = 5.5V
+25°C
–40°C
85
80
75
70
65
60
55
50
45
40
300 400 500 600 700 800 900 1000
FREQUENCY (kHz)
Figure 36. Maximum Duty Cycle vs. Frequency
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84
82
80
78
76
74
72
70
68
66
64
62
60
58
56
54
52
50
48
46
44
42
40
3.6
VDD = 3.6V
VDD = 5.5V
4.8 6.0 7.2 8.4
+125°C
+25°C
–40°C
9.6 10.8 12.0 13.2 14.4 15.6
VIN (V)
Figure 37. Maximum Duty Cycle vs. High Voltage Input (VIN)
680
VREG = 2.7V
630 VREG = 3.6V
VREG = 5.5V
580
530
480
430
380
330
280
230
180
–40 –20
0
20 40 60 80 100 120
TEMPERATURE (°C)
Figure 38. Minimum Off Time vs. Temperature
680
+125°C
630
+25°C
–40°C
580
530
480
430
380
330
280
230
180
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
VREG (V)
Figure 39. Minimum Off Time vs. VDD (Low Input Voltage)
Rev. 0 | Page 12 of 40

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