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ADCLK944 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADCLK944
Beschreibung SIGE CLOCK FANOUT BUFFER
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 12 Seiten
ADCLK944 Datasheet, Funktion
FEATURES
Operating frequency: 7.0 GHz
Broadband random jitter: 50 fs rms
On-chip input terminations
Power supply (VCC − VEE): 2.5 V to 3.3 V
APPLICATIONS
Low jitter clock distribution
Clock and data signal restoration
Level translation
Wireless communications
Wired communications
Medical and industrial imaging
ATE and high performance instrumentation
2.5 V/3.3 V, Four LVPECL Outputs,www.DataSheet4U.com
SiGe Clock Fanout Buffer
ADCLK944
FUNCTIONAL BLOCK DIAGRAM
ADCLK944
VREF
REFERENCE
VT
CLK
CLK
LVPECL
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
Figure 1.
GENERAL DESCRIPTION
The ADCLK944 is an ultrafast clock fanout buffer fabricated on
the Analog Devices, Inc., proprietary XFCB3 silicon germanium
(SiGe) bipolar process. This device is designed for high speed
applications requiring low jitter.
The device has a differential input equipped with center-tapped,
differential, 100 Ω on-chip termination resistors. The input can
accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended),
and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREF
pin is available for biasing ac-coupled inputs.
The ADCLK944 features four full-swing emitter-coupled logic
(ECL) output drivers. For LVPECL (positive ECL) operation,
bias VCC to the positive supply and VEE to ground. For ECL
operation, bias VCC to ground and VEE to the negative supply.
The ECL output stages are designed to directly drive 800 mV
each side into 50 Ω terminated to VCC − 2 V for a total differen-
tial output swing of 1.6 V.
The ADCLK944 is available in a 16-lead LFCSP and is specified
for operation over the standard industrial temperature range of
−40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.






ADCLK944 Datasheet, Funktion
ADCLK944
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
www.DataSheet4U.com
CLK 1
VT 2
VREF 3
CLK 4
ADCLK944
TOP VIEW
(Not to Scale)
12 Q1
11 Q1
10 Q2
9 Q2
NOTES
1. EXPOSED PAD MUST BE CONNECTED
TO VEE.
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Mnemonic Description
1 CLK Differential Input (Positive).
2 VT Center Tap. This pin provides the center tap of a 100 Ω input resistor for the CLK and CLK inputs.
3 VREF Reference Voltage. This pin provides the reference voltage for biasing ac-coupled CLK and CLK inputs.
4 CLK Differential Input (Negative).
5, 16
6, 7
VEE
Q3, Q3
Negative Supply Pin.
Differential LVPECL Outputs.
8, 13
9, 10
VCC
Q2, Q2
Positive Supply Pin.
Differential LVPECL Outputs.
11, 12
Q1, Q1
Differential LVPECL Outputs.
14, 15
Q0, Q0
Differential LVPECL Outputs.
EPAD
The exposed pad must be connected to VEE.
Rev. 0 | Page 6 of 12

6 Page









ADCLK944 pdf, datenblatt
ADCLK944
OUTLINE DIMENSIONS
PIN 1
INDICATOR
0.80
0.75
0.70
SEATING
PLANE
3.10
3.00 SQ
2.90
TOP VIEW
0.50
BSC
0.30
0.25
0.18
13
12
16
1
EXPOSED
PAD
PIN 1
INDICATOR
1.60
1.50 SQ
1.40
0.45
0.40
9
8
4
5
BOTTOM VIEW
0.25 MIN
0.35
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.20 REF
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
ORDERING GUIDE
Model1
ADCLK944BCPZ-R2
ADCLK944BCPZ-R7
ADCLK944BCPZ-WP
ADCLK944/PCBZ
1 Z = RoHS Compliant Part.
COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6.
Figure 22. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
3 mm × 3 mm Body, Very Very Thin Quad
(CP-16-18)
Dimensions shown in millimeters
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
16-Lead LFCSP_WQ
16-Lead LFCSP_WQ
16-Lead LFCSP_WQ
Evaluation Board
Package Option
CP-16-18
CP-16-18
CP-16-18
www.DataSheet4U.com
Branding Code
Y2K
Y2K
Y2K
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08770-0-3/10(0)
Rev. 0 | Page 12 of 12

12 Page





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