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PDF PSMN2R7-30PL Data sheet ( Hoja de datos )
| Número de pieza | PSMN2R7-30PL | |
| Descripción | N-channel 30 V 2.7 m logic level MOSFET | |
| Fabricantes | NXP Semiconductors | |
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PSMN2R7-30PL
www.DataSheet4U.com
N-channel 30 V 2.7 mΩ logic level MOSFET
Rev. 01 — 26 February 2010
Objective data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in TO220 package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Suitable for logic level gate drive
sources
1.3 Applications
DC-to-DC converters
Load switiching
Motor control
Server power supplies
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
Min Typ Max Unit
VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
- - 30 V
ID drain current
Tmb = 25 °C; VGS = 10 V;
[1] -
-
100 A
see Figure 1
Ptot total power
dissipation
Tmb = 25 °C; see Figure 2
- - 170 W
Tj junction temperature
Avalanche ruggedness
-55 -
175 °C
EDS(AL)S non-repetitive
drain-source
avalanche energy
Dynamic characteristics
VGS = 10 V; Tj(init) = 25 °C;
ID = 100 A; Vsup ≤ 30 V;
RGS = 50 Ω; unclamped
- - 300 mJ
QGD
QG(tot)
gate-drain charge
total gate charge
VGS = 4.5 V; ID = 25 A;
VDS = 15 V;
see Figure 14 and 15
- 8 - nC
- 32 - nC
Static characteristics
RDSon
drain-source
VGS = 10 V; ID = 25 A;
on-state resistance Tj = 25 °C; see Figure 12
[2] -
2.3 2.7 mΩ
[1] Continuous current is limited by package.
[2] Measured 3 mm from package.
1 page  
NXP Semiconductors
www.DataSheet4U.com
PSMN2R7-30PL
N-channel 30 V 2.7 mΩ logic level MOSFET
6. Characteristics
Table 6. Characteristics
Symbol Parameter
Static characteristics
V(BR)DSS drain-source
breakdown voltage
VGS(th)
gate-source threshold
voltage
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
RG gate resistance
Dynamic characteristics
QG(tot)
total gate charge
QGS
QGS(th)
QGS(th-pl)
QGD
VGS(pl)
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
gate-source charge
pre-threshold
gate-source charge
post-threshold
gate-source charge
gate-drain charge
gate-source plateau
voltage
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
Conditions
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10 and 11
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 11
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 11
VDS = 30 V; VGS = 0 V; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 125 °C
VGS = 16 V; VDS = 0 V; Tj = 25 °C
VGS = -16 V; VDS = 0 V; Tj = 25 °C
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
see Figure 12
VGS = 10 V; ID = 25 A; Tj = 100 °C;
see Figure 13
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 12
f = 1 MHz
ID = 25 A; VDS = 15 V; VGS = 10 V;
see Figure 14 and 15
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 25 A; VDS = 15 V; VGS = 4.5 V;
see Figure 14 and 15
VDS = 15 V
VDS = 12 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
VDS = 12 V; RL = 0.5 Ω; VGS = 4.5 V;
RG(ext) = 4.7 Ω
Min Typ Max Unit
30 - - V
27 - - V
1.3 1.7 2.15 V
0.5 - - V
- - 2.45 V
- - 2 µA
- - 60 µA
- - 100 nA
- - 100 nA
- 2.9 3.6 mΩ
- - 3.5 mΩ
[2] -
-
2.3 2.7 mΩ
1-
Ω
- 66 - nC
- 60 - nC
- 32 - nC
- 12 - nC
- 6.4 - nC
- 5.6 - nC
- 8 - nC
- 2.7 - V
- 3950 - pF
- 820 - pF
- 360 - pF
- 46 - ns
- 80 - ns
- 75 - ns
- 35 - ns
PSMN2R7-30PL_1
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 26 February 2010
© NXP B.V. 2010. All rights reserved.
5 of 14
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NXP Semiconductors
www.DataSheet4U.com
PSMN2R7-30PL
N-channel 30 V 2.7 mΩ logic level MOSFET
8. Revision history
Table 7. Revision history
Document ID
Release date
PSMN2R7-30PL_1
20100226
Data sheet status
Objective data sheet
Change notice
-
Supersedes
-
PSMN2R7-30PL_1
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 26 February 2010
© NXP B.V. 2010. All rights reserved.
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