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ADV3222 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADV3222
Beschreibung 4:1 Analog Multiplexer
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 20 Seiten
ADV3222 Datasheet, Funktion
www.DataSheet4U.com
800 MHz, 4:1 Analog Multiplexer
ADV3221/ADV3222
FEATURES
Excellent ac performance
−3 dB bandwidth
800 MHz (200 mV p-p)
750 MHz (2 V p-p)
Slew rate: 2400 V/μs
Low power: 75 mW, VS = ±5 V
Excellent video performance
100 MHz, 0.1 dB gain flatness
0.02% differential gain error/0.02° differential phase error
(RL = 150 Ω)
ADV3221 is a pin-for-pin upgrade to the HA4344
Gain = +1 (ADV3221) or gain = +2 (ADV3222)
Low all hostile crosstalk of −85 dB @ 5 MHz, and
−58 dB @ 100 MHz
Latched control lines for synchronous switching
High impedance output disable allows connection of
multiple devices without loading the output bus
16-lead SOIC
APPLICATIONS
Routing of high speed signals including
Video (NTSC, PAL, S, SECAM, YUV, RGB)
Compressed video (MPEG, wavelet)
3-level digital video (HDB3)
Data communications
Telecommunications
GENERAL DESCRIPTION
The ADV3221 and ADV3222 are high speed, high slew rate,
buffered 4:1 analog multiplexers. They offer a −3 dB signal
bandwidth greater than 800 MHz and channel switch times
of less than 20 ns with 1% settling. With lower than −58 dB of
crosstalk and −67 dB isolation (at 100 MHz), the ADV3221 and
ADV3222 are useful in many high speed applications. The diffe-
rential gain error of less than 0.02% and differential phase error
of less than 0.02°, together with 0.1 dB gain flatness out to 100 MHz
while driving a 75 Ω back terminated load, make the ADV3221
and ADV3222 ideal for all types of signal switching.
The ADV3221/ADV3222 include an output buffer that can be
placed into a high impedance state. This allows multiple outputs
FUNCTIONAL BLOCK DIAGRAM
CS
DQ
DQ
ENABLE
LATCH
LATCH
A0
DQ
DQ
LATCH
LATCH
IN0
IN1
IN2
IN3
G = +1
(G = +2)
A1
CK1
CK2
DQ
LATCH
DQ
LATCH
100k
100k
Figure 1.
OUT
to be connected together for cascading stages without the off
channels loading the output bus. The ADV3221 has a gain of
+1, and the ADV3222 has a gain of +2; they both operate on ±5 V
supplies while consuming less than 7.5 mA of idle current. The
channel switching is performed via latched control lines, allowing
synchronous updating in a multiple ADV3221/ADV3222 envi-
ronment.
The ADV3221/ADV3222 are offered in a 16-lead SOIC package
and are available over the extended industrial temperature range of
−40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalog Devicesforitsuse,norforanyinfringementsofpatentsorother
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.






ADV3222 Datasheet, Funktion
ADV3221/ADV3222
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage (V+ − V−)
Analog Input Voltage
Digital Input Voltage
Output Voltage (Disabled Output)
Output Short-Circuit Duration
Output Short-Circuit Current
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
Rating
12 V
V− to V+
0 V to V+
(V+ − 1 V) to (V− + 1 V)
Momentary
50 mA
−65°C to +150°C
−40°C to +85°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 5. Thermal Resistance
Package Type
θJA θJC Unit
16-Lead Narrow-Body SOIC
81
43
°C/W
www.DataSheet4U.com
POWER DISSIPATION
The ADV3221/ADV3222 are operated with ±5 V supplies and
can drive loads down to 150 Ω, resulting in a wide range of
possible power dissipations. For this reason, extra care must
be taken to adjust the operating conditions based on ambient
temperature.
Packaged in a 16-lead narrow-body SOIC, the ADV3221 and
ADV3222 junction-to-ambient thermal impedance (θJA) is 81°C/W.
For long-term reliability, the maximum allowed junction tempera-
ture of the die, TJ, should not exceed 125°C. Temporarily exceeding
this limit may cause a shift in parametric performance due to a
change in stresses exerted on the die by the package. Figure 4
shows the range of the allowed internal die power dissipations
that meet these conditions over the −40°C to +85°C ambient
temperature range. When using Figure 4, do not include the
external load power in the maximum power calculation, but
do include the load current through the die output transistors.
1.50
TJ = 125°C
1.25
1.00
0.75
0.50
15
25 35 45 55 65 75
AMBIENT TEMPERATURE (°C)
85
Figure 4. Maximum Die Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. 0 | Page 6 of 20

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ADV3222 pdf, datenblatt
ADV3221/ADV3222
5
INPUT
4
1.25
1.00
3 0.75
2 0.50
1 0.25
ERROR
00
–1
OUTPUT
–2
–0.25
–0.50
–3 –0.75
–4 –1.00
–5 –1.25
0 1 2 3 4 5 6 7 8 9 10
TIME (ns)
Figure 30. ADV3221 Settling Time, 2 V Step
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
0.1
PSR (V–)
PSR (V+)
1 10 100
FREQUENCY (MHz)
Figure 31. ADV3221 PSR
1k
10k
200
180
160
140
120
100
80
60
40
20
0
1k
10k 100k 1M 10M 100M
FREQUENCY (Hz)
Figure 32. ADV3221 Output Noise vs. Frequency
www.DataSheet4U.com
5 1.25
OUTPUT
4 1.00
3 INPUT
2
0.75
0.50
1 0.25
ERROR
00
–1 –0.25
–2 –0.50
–3 –0.75
–4 –1.00
–5 –1.25
0 1 2 3 4 5 6 7 8 9 10
TIME (ns)
Figure 33. ADV3222 Settling Time, 2 V Step
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
0.1
PSR (V–)
PSR (V+)
1 10 100
FREQUENCY (MHz)
Figure 34. ADV3222 PSR
1k
10k
200
180
160
140
120
100
80
60
40
20
0
1k
10k 100k 1M 10M 100M
FREQUENCY (Hz)
Figure 35. ADV3222 Output Noise vs. Frequency
Rev. 0 | Page 12 of 20

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