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PDF ADAS1127 Data sheet ( Hoja de datos )
| Número de pieza | ADAS1127 | |
| Descripción | 24-Bit Current-to-Digital ADC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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64-Channel, 24-Bit Current-to-Digital ADC
ADAS1127
FEATURES
GENERAL DESCRIPTION
64-channel, low level current-to-digital converter
Up to 24-bit resolution
Up to 19.7 kSPS (50.7 μs integration time)
Simultaneous sampling
Ultralow noise (down to 0.4 fC [2500e−])
User-adjustable full-scale range
INL: ±0.025% of reading ±0.75 ppm of FSR
Very low power dissipation: 6.25 mW/channel
LVDS self-clocked serial data interface
SPI configuration registers (daisy-chain)
On-board temperature sensor and reference buffer
10 mm × 10 mm, mini-BGA package
Low cost external components
Support tools
Evaluation board
Reference design with reference layout
FPGA Verilog code
The ADAS1127 is a 64-channel, current-to-digital, analog-to-
digital converter (ADC). It contains 64 low power, low noise,
low input current integrators, simultaneous sample-and-holds,
and a high speed, high resolution ADCs with configurable
sampling rate and resolutions up to 24 bits.
All converted channel results are output on a single LVDS self-
clocked serial interface, which reduces external hardware.
An SPI-compatible serial interface allows configuration of the
ADC using the SDI input. The SDO output allows the user to
daisy-chain several ADCs on a single, 3-wire bus. The
ADAS1127 uses the separate supply IOVDD to reduce the
digital noise effect on the conversions.
The ADAS1127 is in a 10 mm × 10 mm, mini-BGA package.
For more information on the ADAS1127, contact Analog
Devices, Inc, at [email protected].
APPLICATIONS
Medical, industrial, and security CT scanner data acquisition
Photodiode sensors
Dosimetry and radiation therapy systems
Optical fiber power monitoring
X-ray detection systems
High channel-count data acquisition systems (current or
voltage inputs)
FUNCTIONAL BLOCK DIAGRAM
2.5V 3.3V
TO NEXT
SDI
SDO
TO ALL ADCs
AN0
AN31
AN32
AN63
KGND
F
OR0
S/H
F
OR31
S/H
F
OR32
S/H
F
OR63
S/H
CONFIGURATION
SDI
SCK
CS
RESET
+
–ADCL
DATA
PROCESSING
LVDS/CMOS
INTERFACE
OR[0:63]
TEMPERATURE
ADAS1127
SDI
DOUTx
CLKx
SYNC
IOVDD
IOGND
2.5V
FPGA
VIO
BUFP
BUFN REF
Figure 1.
2.048V
SDI FROM DOUT
FROM OF OTHER ADCs
PREVIOUS
SDO
Rev. Sp0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
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