|
|
PDF ADC1115S125 Data sheet ( Hoja de datos )
| Número de pieza | ADC1115S125 | |
| Descripción | Single 11-bit ADC | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ADC1115S125 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
ADC1115S125
www.DataSheet4U.com
Single 11-bit ADC; 125 Msps with input buffer; CMOS or LVDS
DDR digital outputs
Rev. 01 — 12 April 2010
Preliminary data sheet
1. General description
The ADC1115S125 is a single channel 11-bit Analog-to-Digital Converter (ADC) optimized
for high dynamic performances and low power consumption at sample rates up to
125 Msps. Pipelined architecture and output error correction ensure the ADC1115S125 is
accurate enough to guarantee zero missing codes over the entire operating range.
Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in
CMOS mode, thanks to a separate digital output supply.
The ADC1115S125 supports the Low Voltage Differential Signalling (LVDS) Double Data
Rate (DDR) output standard. An integrated Serial Peripheral Interface (SPI) allows the
user to easily configure the ADC.
The device also includes a SPI programmable full-scale to allow flexible input voltage
range from 1 V to 2 V (peak-to-peak). With excellent dynamic performance from the
baseband to input frequencies of 170 MHz or more, the ADC1115S125 is ideal for use in
communications, imaging and medical applications - especially in high Intermediate
Frequency (IF) applications thanks to the integrated input buffer. The input buffer ensures
that the input impedance remains constant and low and the performance consistent over
a wide frequency range.
2. Features and benefits
SNR, 66.5 dBFS / SFDR, 86 dBc
Input bandwidth, 600 MHz
Sample rate up to 125 Msps
Power dissipation, 840 mW including
analog input buffer
11-bit pipelined ADC core
SPI
Clock input divider by 2 for less jitter Duty cycle stabilizer
contribution
Integrated input buffer
Fast OuT of Range (OTR) detection
Flexible input voltage range: 1 V (p-p) to INL ±1.25 LSB, DNL ±0.25 LSB
2 V (p-p)
CMOS or LVDS DDR digital outputs Offset binary, two’s complement, gray
code
Pin compatible with the ADC1415S
Power-down and Sleep modes
series, the ADC1215S series and the
ADC1015S series
HVQFN40 package
1 page  
NXP Semiconductors
ADC1115S125
www.DataShee
11-bit, 125 Msps ADC; input buffer; CMOS or LVDS DDR digital outputs
Table 3.
Symbol
n.c.
DAVM
DAVP
Pin description …continued (LVDS/DDR) digital outputs)
Pin [1] Type [2] Description
30 -
not connected
31 O data valid output clock, complement
32 O data valid output clock, true
[1] Pins 1 to 16 and pins 33 to 40 are the same for both CMOS and LVDS DDR outputs (see Table 2)
[2] P: power supply; G: ground; I: input; O: output; I/O: input/output.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
VO output voltage
pins D10 to D0 or
pins D10P to D0P and
pins D10M to D0M
−0.4
VDDA(3V)
VDDA(5V)
VDDO
ΔVCC
Tstg
Tamb
Tj
analog supply voltage 3 V
analog supply voltage 5 V
output supply voltage
supply voltage difference
storage temperature
ambient temperature
junction temperature
on pin VDDA3V
on pin VDDA5V
VDDA(3V) − VDDO
−0.5
−0.5
−0.5
<tbd>
−55
−40
-
Max
+3.9
+4.6
+6.0
+4.6
<tbd>
+125
+85
125
Unit
V
V
V
V
V
°C
°C
°C
8. Thermal characteristics
Table 5. Thermal characteristics
Symbol
Rth(j-a)
Rth(j-c)
Parameter
thermal resistance from junction to ambient
thermal resistance from junction to case
Conditions
Typ
[1] 30.5
[1] 13.3
[1] Value for six layers board in still air with a minimum of 25 thermal vias.
9. Static characteristics
Unit
K/W
K/W
Table 6. Static characteristics[1]
Symbol
Parameter
Supplies
VDDA(5V)
VDDA(3V)
VDDO
analog supply voltage 5 V
analog supply voltage 3 V
output supply voltage
IDDA(5V)
analog supply current 5 V
Conditions
CMOS mode
LVDS DDR mode
fclk = 125 Msps;
fi =70 MHz
Min
4.75
2.85
1.65
2.85
-
Typ
5.0
3.0
1.8
3.0
46
Max Unit
5.25 V
3.4 V
3.6 V
3.6 V
- mA
ADC1115S125_1
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 April 2010
© NXP B.V. 2010. All rights reserved.
5 of 35
5 Page 
NXP Semiconductors
ADC1115S125
www.DataSheet4U.com
11-bit, 125 Msps ADC; input buffer; CMOS or LVDS DDR digital outputs
10.3 SPI timings
Table 9. Characteristics
Symbol Parameter
SPI timings
tw(SCLK)
tw(SCLKH)
tw(SCLKL)
tsu
SCLK pulse width
SCLK pulse width HIGH
SCLK pulse width LOW
set-up time
th hold time
fclk(max) maximum clock frequency
Conditions
data to SCLKH
CS to SCLKH
data to SCLKH
CS to SCLKH
Min Typ Max Unit
40 -
16 -
16 -
5-
5-
2-
2-
--
- ns
- ns
- ns
- ns
- ns
- ns
- ns
25 MHz
[1] Typical values measured at VDDA(3V) = 3 V, VDDO = 1.8 V, VDDA(5V) = 5 V; Tamb = 25 °C and CL = 5 pF;
minimum and maximum values are across the full temperature range Tamb = −40 °C to +85 °C at
VDDA(3V) = 3 V, VDDO = 1.8 V, VDDA(5V) = 5 V, VINP − VINM = −1 dBFS; internal reference mode; applied to
CMOS and LVDS interface; unless otherwise specified
tsu
CS
tsu
th tw(SCLK)
tw(SCLKL)
tw(SCLKH)
th
SCLK
SDIO
R/W W1 W0 A12
A11
Fig 6. SPI timing
D2 D1 D0
005aaa065
11. Application information
11.1 Device control
The ADC1115S125 can be controlled via the Serial Peripheral Interface (SPI control
mode) or directly via the I/O pins (Pin control mode).
11.1.1 SPI and Pin control modes
The device enters Pin control mode at power-up, and remains in this mode as long as pin
CS is held HIGH. In Pin control mode, the SPI pins SDIO, CS and SCLK are used as
static control pins.
SPI control mode is enabled by forcing pin CS LOW. Once SPI control mode has been
enabled, the device will remain in this mode. The transition from Pin control mode to SPI
control mode is illustrated in Figure 7.
ADC1115S125_1
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 April 2010
© NXP B.V. 2010. All rights reserved.
11 of 35
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADC1115S125.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ADC1115S125 | Single 11-bit ADC | NXP Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |