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PDF PBSS305ND Data sheet ( Hoja de datos )
| Número de pieza | PBSS305ND | |
| Descripción | 3A NPN low VCEsat (BISS) transistor | |
| Fabricantes | NXP Semiconductors | |
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PBSS305ND
100 V, 3 A NPN low VCEsat (BISS) transistor
Rev. 01 — 10 April 2006
www.DataSheet4U.com
Product data sheet
1. Product profile
1.1 General description
NPN low VCEsat Breakthrough In Small Signal (BISS) transistor in a SOT457 (SC-74)
small Surface-Mounted Device (SMD) plastic package.
PNP complement: PBSS305PD.
1.2 Features
I Low collector-emitter saturation voltage VCEsat
I High collector current capability IC and ICM
I High collector current gain (hFE) at high IC
I High efficiency due to less heat generation
I Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
I High-voltage DC-to-DC conversion
I High-voltage MOSFET gate driving
I High-voltage motor control
I High-voltage power switches (e.g. motors, fans)
I Thin Film Transistor (TFT) backlight inverter
I Automotive applications
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter
VCEO
IC
ICM
collector-emitter voltage
collector current
peak collector current
RCEsat collector-emitter
saturation resistance
Conditions
open base
single pulse;
tp ≤ 1 ms
IC = 2 A;
IB = 200 mA
Min Typ Max
- - 100
[1] - - 3
--4
[2] -
73 95
[1] Device mounted on a ceramic PCB, Al2O3, standard footprint.
[2] Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
Unit
V
A
A
mΩ
1 page  
Philips Semiconductors
PBSS305ND
www.DataSheet4U.com
100 V, 3 A NPN low VCEsat (BISS) transistor
103
Zth(j-a)
(K/W)
102
10
duty cycle =
1
0.75
0.5
0.33
0.2
0.1
0.05
0.02
0.01
10
006aaa271
10−1
10−5
10−4
10−3
10−2
10−1
1
10 102 103
tp (s)
FR4 PCB, standard footprint
Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
103
Zth(j-a)
(K/W)
102
10
duty cycle =
1
0.75
0.5
0.33
0.2
0.1
0.05
0.02
0.01
1
0
006aaa272
10−1
10−5
10−4
10−3
10−2
10−1
1
10 102 103
tp (s)
FR4 PCB, mounting pad for collector 1 cm2
Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS305ND_1
Product data sheet
Rev. 01 — 10 April 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
5 of 15
5 Page 
Philips Semiconductors
9. Package outline
PBSS305ND
www.DataSheet4U.com
100 V, 3 A NPN low VCEsat (BISS) transistor
3.1
2.7
65
3.0 1.7
2.5 1.3
pin 1 index
1.1
0.9
4 0.6
0.2
12
0.95
1.9
Dimensions in mm
Fig 16. Package outline SOT457 (SC-74)
3
0.40
0.25
0.26
0.10
04-11-08
10. Packing information
Table 8. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number Package Description
Packing quantity
3000 10000
PBSS305ND SOT457
4 mm pitch, 8 mm tape and reel; T1
[2] -115
-135
4 mm pitch, 8 mm tape and reel; T2
[3] -125
-165
[1] For further information and the availability of packing methods, see Section 14.
[2] T1: normal taping
[3] T2: reverse taping
PBSS305ND_1
Product data sheet
Rev. 01 — 10 April 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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