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PDF AD7699 Data sheet ( Hoja de datos )
| Número de pieza | AD7699 | |
| Descripción | 500 kSPS PulSAR ADC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD7699 (archivo pdf) en la parte inferior de esta página. Total 29 Páginas | ||
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Data Sheet
FEATURES
16-bit resolution with no missing codes
8-channel multiplexer with choice of inputs
Unipolar single-ended
Differential (GND sense)
Pseudobipolar
Throughput: 500 kSPS
INL: ±0.5 LSB typical, ±1.5 LSB maximum (±23 ppm or FSR)
Dynamic range: 93.3 dB
SINAD: 91.5 dB at 20 kHz
THD: −97 dB at 20 kHz
Analog input range: 0 V to VREF with VREF up to VDD
Multiple reference types
Internal 4.096 V
External buffered (up to 4.096 V)
External (up to VDD)
Internal temperature sensor
Channel sequencer, selectable 1-pole filter, busy indicator
No pipeline delay, SAR architecture
Single-supply 5 V operation with
1.8 V to 5 V logic interface
Serial interface compatible with SPI, MICROWIRE,
QSPI, and DSP
Power dissipation
26 mW at 500 kSPS
5.2 μW at 100 SPS
Standby current: 50 nA
20-lead 4 mm × 4 mm LFCSP package
APPLICATIONS
Battery-powered equipment
Medical instruments: ECG/EKG
Mobile communications: GPS
Personal digital assistants
Power line monitoring
Data acquisition
Seismic data acquisition systems
Instrumentation
Process control
16-Bit, 8-Channel,
500 kSPS PulSAR ADC
AD7699
FUNCTIONAL BLOCK DIAGRAM
0.5V TO 4.096V
0.1µF
0.5V TO VDD
10µF
5V
REFIN REF VDD
BAND GAP
REF
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
COM
TEMP
SENSOR
AD7699
MUX
16-BIT SAR SPI SERIAL
ADC
INTERFACE
ONE-POLE
LPF
SEQUENCER
GND
1.8V
VIO TO
VDD
CNV
SCK
SDO
DIN
Figure 1.
Table 1. Multichannel 14-/16-Bit PulSAR® ADC
Type
Channels 250 kSPS 500 kSPS ADC Driver
14-Bit 8
AD7949
ADA4841-1
16-Bit 4
AD7682
ADA4841-1
16-Bit 8
AD7689 AD7699 ADA4841-1
GENERAL DESCRIPTION
The AD7699 is an 8-channel, 16-bit, charge redistribution
successive approximation register (SAR) analog-to-digital
converter (ADC) that operates from a single power supply, VDD.
The AD7699 contains all components for use in a multichannel,
low power data acquisition system, including a true 16-bit SAR
ADC with no missing codes; an 8-channel low crosstalk multip-
lexer useful for configuring the inputs as single-ended (with or
without ground sense), differential, or bipolar; an internal 4.096 V
low drift reference and buffer; a temperature sensor; a selectable
one-pole filter; and a sequencer that is useful when channels are
continuously scanned in order.
The AD7699 uses a simple serial port interface (SPI) for writing
to the configuration register and receiving conversion results.
The SPI interface uses a separate supply, VIO, which is set to the
host logic level. Power dissipation scales with throughput.
The AD7699 is housed in a tiny 20-lead LFCSP with operation
specified from −40°C to +85°C.
Rev. E
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2008–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
AD7699
TIMING SPECIFICATIONS
VDD = 4.5 V to 5.5 V, VREF = 4.096 to VDD, VIO = 1.8 V to VDD, all specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter1
Conversion Time: CNV Rising Edge to Data Available
Acquisition Time
Time Between Conversions
CNV Pulse Width
Data Write/Read During Conversion
SCK Period
SCK Low Time
SCK High Time
SCK Falling Edge to Data Remains Valid
SCK Falling Edge to Data Valid Delay
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 1.8 V
CNV Low to SDO D15 MSB Valid
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 1.8 V
CNV High or Last SCK Falling Edge to SDO High Impedance
CNV Low to SCK Rising Edge
DIN Valid Setup Time from SCK Rising Edge
DIN Valid Hold Time from SCK Rising Edge
Symbol
tCONV
tACQ
tCYC
tCNVH
tDATA
tSCK
tSCKL
tSCKH
tHSDO
tDSDO
tEN
tDIS
tCLSCK
tSDIN
tHDIN
Min Typ
400
2
10
tDSDO + 2
11
11
4
10
5
5
Max
1.6
1.2
16
17
18
21
28
15
17
18
22
25
32
1 See Figure 2 and Figure 3 for load conditions.
500µA IOL
Unit
µs
ns
µs
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TO SDO
CL
50pF
1.4V
500µA IOH
Figure 2. Load Circuit for Digital Interface Timing
30% VIO
tDELAY
70% VIO
2V OR VIO – 0.5V1
0.8V OR 0.5V2
tDELAY
2V OR VIO – 0.5V1
0.8V OR 0.5V2
1 2V IF VIO ABOVE 2.5V, VIO – 0.5V IF VIO BELOW 2.5V.
2 0.8V IF VIO ABOVE 2.5V, 0.5V IF VIO BELOW 2.5V.
Figure 3. Voltage Levels for Timing
Rev. E | Page 5 of 29
5 Page 
Data Sheet
4.099
4.098
4.097
4.096
4.095
4.094
4.093
4.092
–55 –35 –15
5
25 45 65
85 105 125
TEMPERATURE (°C)
Figure 23. Internal Reference Output Voltage vs. Temperature, Three devices
AD7699
25
20
15
VDD = 5V, 85°C
10
VDD = 5V, 25°C
5
0
0 20 40 60 80 100 120
SDO CAPACITIVE LOAD (pF)
Figure 24. tDSDO Delay vs. SDO Capacitance Load and Supply
Rev. E | Page 11 of 29
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet AD7699.PDF ] | |
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