PDF PCA9514A Data sheet ( Hoja de datos )

Número de pieza	PCA9514A
Descripción	Hot swappable I2C-bus and SMBus bus buffer
Fabricantes	NXP Semiconductors
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No Preview Available ! www.DataSheet4U.com PCA9513A; PCA9514A Hot swappable I2C-bus and SMBus bus buffer Rev. 01 — 11 October 2005 Product data sheet 1. General description The PCA9513A and PCA9514A are hot swappable I2C-bus and SMBus buffers that allow I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9513A and PCA9514A provides bidirectional buffering, keeping the backplane and card capacitances isolated. Rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements. The PCA9513A and PCA9514A incorporates a digital ENABLE input pin, which enables the device when asserted HIGH and forces the device into a Low current mode when asserted LOW, and an open-drain READY output pin, which indicates that the backplane and card sides are connected together (HIGH) or not (LOW). The PCA9513A supplies a 92 µA current source to SCLIN and SDAIN pins in lieu of using pull-up resistors which is ideal for multidrop bus applications. Including the current source in the device provides for a consistent RC time constant as cards are removed and inserted into the backplane. The current source is high-impedance whenever the pin voltage is greater than the part VCC. The PCA9513A and PCA9514A rise time accelerator threshold is 0.8 V to provide better noise margin over the PCA9511A which is set to 0.6 V. Remark: The dynamic offset design of the PCA9510A/11A/12A/13A/14A I/O drivers allow them to be connected to another PCA9510A/11A/12A/13A/14A device in series or in parallel and to the A side of the PCA9517. The PCA9510A/11A/12A/13A/14A cannot connect to the static offset I/Os used on the PCA9515/15A/16/16A/18 or PCA9517 B side or P82B96 Sx/y side. 2. Features s Bidirectional buffer for SDA and SCL lines increases fanout and prevents SDA and SCL corruption during live board insertion and removal from multi-point backplane systems s Compatible with I2C-bus Standard mode, I2C-bus Fast mode, and SMBus standards s Built-in ∆V/∆t rise time accelerators on all SDA and SCL lines (0.8 V threshold) s Rise time accelerator threshold moved from 0.6 V to 0.8 V for improved noise margin s Active HIGH ENABLE input s Active HIGH READY open-drain output s High-impedance SDAn and SCLn pins for VCC = 0 V 1 page Philips Semiconductors 7. Pinning information 7.1 Pinning PCA9513A; PCA9514Awww.DataSheet4U.com Hot swappable I2C-bus and SMBus bus buffer ENABLE 1 8 VCC SCLOUT 2 PCA9513AD 7 SDAOUT SCLIN 3 PCA9514AD 6 SDAIN GND 4 5 READY 002aab676 Fig 3. Pin conﬁguration for SO8 ENABLE 1 SCLOUT 2 SCLIN 3 GND 4 PCA9513ADP PCA9514ADP 8 VCC 7 SDAOUT 6 SDAIN 5 READY 002aab677 Fig 4. Pin conﬁguration for TSSOP8 (MSOP8) 7.2 Pin description Table 3: Pin description Symbol Pin Description ENABLE 1 Chip enable. Grounding this input puts the part in a Low current (< 1 µA) mode. It also disables the rise time accelerators, isolates SDAIN from SDAOUT and isolates SCLIN from SCLOUT. SCLOUT 2 serial clock output to and from the SCL bus on the card SCLIN 3 serial clock input to and from the SCL bus on the backplane GND 4 Ground. Connect this pin to a ground plane for best results. READY 5 open-drain output which pulls LOW when SDAIN and SCLIN are disconnected from SDAOUT and SCLOUT, and goes HIGH when the two sides are connected SDAIN 6 serial data input to and from the SDA bus on the backplane SDAOUT 7 serial data output to and from the SDA bus on the card VCC 8 power supply 8. Functional description Refer to Figure 1 “Block diagram of PCA9513A” and Figure 2 “Block diagram of PCA9514A”. 8.1 Start-up An undervoltage and initialization circuit holds the parts in a disconnected state which presents high-impedance to all SDAn and SCLn pins during power-up. A LOW on the ENABLE pin also forces the parts into the low current disconnected state when the ICC is essentially zero. As the power supply is brought up and the ENABLE is HIGH or the part is powered and the ENABLE is taken from LOW to HIGH it enters an initialization state where the internal references are stabilized and the 92 µA input pull-ups (on the PCA9513A) is enabled. At the end of the initialization state the ‘Stop Bit And Bus Idle’ detect circuit is enabled. With the ENABLE pin HIGH long enough to complete the initialization state (ten) and remaining HIGH when all the SDAn and SCLn pins have been PCA9513A_PCA9514A_1 Product data sheet Rev. 01 — 11 October 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. 5 of 25 5 Page Philips Semiconductors PCA9513A; PCA9514Awww.DataSheet4U.com Hot swappable I2C-bus and SMBus bus buffer BACKPLANE VCC BACKPLANE CONNECTOR BD_SEL SDA SCL POWER SUPPLY HOT SWAP I/O PERIPHERAL CARD 1 R1 10 kΩ C1 0.01 µF R2 10 kΩ R3 10 kΩ R4 10 kΩ ENABLE VCC SDAOUT SDAIN SCLOUT SCLIN READY GND CARD1_SDA CARD1_SCL POWER SUPPLY HOT SWAP I/O PERIPHERAL CARD 2 R5 10 kΩ C3 0.01 µF R6 10 kΩ R7 10 kΩ R8 10 kΩ ENABLE VCC SDAOUT SDAIN SCLOUT SCLIN READY GND CARD2_SDA CARD2_SCL POWER SUPPLY HOT SWAP I/O PERIPHERAL CARD N R9 10 kΩ C5 0.01 µF R10 10 kΩ R11 10 kΩ R12 10 kΩ ENABLE VCC SDAOUT SDAIN SCLOUT SCLIN GND READY CARDN_SDA CARDN_SCL 002aab678 Fig 9. Hot swapping multiple I/O cards into a backplane using the PCA9513A in a cPCI, VME, and AdvancedTCA system PCA9513A_PCA9514A_1 Product data sheet Rev. 01 — 11 October 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. 11 of 25 11 Page

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